3D-SoftChip: A Novel Architecture for Next-Generation Adaptive Computing Systems
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3D-SoftChip: A Novel Architecture for Next-Generation Adaptive Computing Systems Chul Kim,1 Alex Rassau,1 Stefan Lachowicz,1 Mike Myung-Ok Lee,2 and Kamran Eshraghian3 1 Centre
for Very High Speed Microelectronic Systems, Edith Cowan University, Joondalup, WA 6027, Australia of Information and Communication Engineering, Dongshin University, Naju, Chonnam 520714, South Korea 3 Eshraghian Laboratories Pty Ltd, Technology Park, Bentley, WA 6102, Australia 2 School
Received 1 October 2004; Revised 15 March 2005; Accepted 25 May 2005 This paper introduces a novel architecture for next-generation adaptive computing systems, which we term 3D-SoftChip. The 3D-SoftChip is a 3-dimensional (3D) vertically integrated adaptive computing system combining state-of-the-art processing and 3D interconnection technology. It comprises the vertical integration of two chips (a configurable array processor and an intelligent configurable switch) through an indium bump interconnection array (IBIA). The configurable array processor (CAP) is an array of heterogeneous processing elements (PEs), while the intelligent configurable switch (ICS) comprises a switch block, 32bit dedicated RISC processor for control, on-chip program/data memory, data frame buffer, along with a direct memory access (DMA) controller. This paper introduces the novel 3D-SoftChip architecture for real-time communication and multimedia signal processing as a next-generation computing system. The paper further describes the advanced HW/SW codesign and verification methodology, including high-level system modeling of the 3D-SoftChip using SystemC, being used to determine the optimum hardware specification in the early design stage. Copyright © 2006 Hindawi Publishing Corporation. All rights reserved.
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INTRODUCTION
System design is becoming increasingly challenging as the complexity of integrated circuits and the time-to-market pressures relentlessly increase. Adaptive computing is a critical technology to develop for future computing systems in order to resolve most of the problems that system designers are now faced with due in no small part to its potential for wide applicability. Up until now, however, this concept has not been fully realized because of many technology constraints such as chip real-estate limitations and the software complexity. With the coupled advancement of semiconductor processing technology and software technology, however, adaptive computing is now facing a turning point. For instance, the reconfigurable computing concept has more recently started to receive considerable research attention [1–3] and this concept is now starting to move and expand into the realm of adaptive computing. Software defined virtual hardware [4] and “do-it-all” devices [5] are good examples that demonstrate this development direction for computing systems. The major forthcoming impact from the deployment of adaptive computing is do-it-all devices. For example, a small handheld PDA size device could assume the functionality of about 10 standard devices simply depending
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