7 kV 4H-SiC GTO Thyristors
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7 kV 4H-SiC GTO Thyristors Stephen Van Campen, Andris Ezis, John Zingaro, Garrett Storaska, R.Chris Clarke, Vic Temple1, Mark Thompson1, Todd Hansen1 Northrop Grumman, Advanced Materials and Semiconductor Device Technology Center, PO Box 1521 MS 3B10, Baltimore, MD 21203 1 Silicon Power Corporation, 175 Great Valley Parkway, Malvern, PA 19355 ABSTRACT High Power asymmetric SiC GTOs (Gate Turn-Off Thyristors) were fabricated on n-type 4H-SiC substrates with multiple epi-layers and were tested to investigate breakdown voltage, maximum current density, switching characteristics, and temperature dependences. Comparison of breakdown voltages achieved by GTOs with Guard Ring edge termination and GTOs with a proprietary Junction Termination Extension (JTE) fabricated on the same wafer are made. Individual GTOs with a nominal area of 4 mm2 (2 mm x 2 mm) utilizing the JTE were tested in forward bias and found to support over 6 kV at leakage currents of less than 5 mA. In addition, GTOs with a nominal area of 0.25 mm2 (0.5 mm x 0.5 mm) utilizing the JTE were found to support over 7 kV. These blocking voltages are the highest reported for GTOs in SiC. [1-5] Wafer maps of the breakdown voltages for older and newer wafers suggest an improvement of the material. The defect density for the newer wafer is estimated to be greater than the micropipe density. The on-state characteristics are equally impressive, with 4 mm2 GTOs carrying > 1000 A/cm2. The GTO has a forward voltage drop of 3.66 V at a current density of 300 A/cm2 at room temperature and a forward voltage drop of 3.1 V at 300 A/cm2 at 224 oC. This indicates that on-state losses should not be excessive, even at high current densities and high temperatures. INTRODUCTION The higher breakdown field, higher thermal conductivity, and wide bandgap give SiC an advantage over Si for high power, high speed, and high temperature device operation. The SiC GTO has advantages as a power switch over its counterparts. BJTs suffer from a reduction in gain at high current densities [6] and MOS devices suffer from poor channel mobility and poor reliability of the oxide at high temperatures. The conductivity modulated drift region of the GTO allows high voltages (> 5000 volts) and high current densities (>1000 Amps/cm2) while maintaining a low forward voltage. Potential use of the GTO would be in electric vehicles, electric ships, and in power utilities. The GTO described here was fabricated to provide high voltage and high current density capabilities. The area of the device was designed to avoid device critical defects in the material; this limits the total current that these devices are capable of carrying. To realize the potential of SiC, difficulties with material defects, passivation, and edge termination must be overcome. To realize the benefit of lower on-resistance from a thinner drift region, the edge termination design and execution must be sufficient to allow the device to achieve the maximum theoretical breakdown voltages. It is the novel JTE design and fabrication that
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