A Planarization Model in Chemical Mechanical Polishing of Silicon Oxide using High Selective CeO 2 Slurry
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A Planarization Model in Chemical Mechanical Polishing of Silicon Oxide using High Selective CeO2 Slurry Jong Won Lee, Bo Un Yoon, Sangrok Hah and Joo Tae Moon Semiconductor R&D Center, Samsung Electronics Co. Ltd. San#24 Nongseo-Ri, Kiheung-Eup, Yongin-Si, Kyungki-Do, Korea Tel:82-2-760-6331, Fax:82-2-760-6299, E-mail:[email protected]
ABSTRACT This paper attempts to establish planarization model in chemical mechanical polishing of silicon oxide using high selective ceria slurry. Though removal rate of the high area is increased due to a high pressure focused on the area with abrasive and pad, the removal rate of the same area is not increased but decreased even in the very beginning of polishing with ceria slurry. It also observed that only the elevated area is polished and dishing is not occurred during the polishing in high selective ceria CMP. In this work, it is proposed that ceria abrasives are filled in the low trench area and then support the pad as well as high area during the CMP, which results in planarization without dishing. INTRODUCTION As the design rule of IC device decreases, it becomes more difficult to completely fill the trench area especially in shallow trench isolation(STI) formation. One of the promising solutions is the introduction of a thin silicon nitride stopper film to reduce the aspect ratio of the trench structure and high selective chemical mechanical polishing(CMP) process. Therefore, many researchers have been interested in high selective CMP processes and the development of applicable slurry. Ceria (CeO2) based slurry is one of the candidates of high selectivity slurry. In this work, we have investigated the mechanism of planarization for the CMP of silicon oxide using high selective ceria based slurry. EXPERIMENTAL
In this study 8 inch blanket wafers with PETEOS of 10000
and silicon nitride of 2000
were used. And DRAM STI patterned wafers were also used. All wafers were polished by using a IC1400/SUBA500 stack pad manufactured by RODEL, Inc. CMP process was
M5.3.1
performed by using a rotary CMP tool for one minute at a down force of 4psi, a table speed of 50rpm, a spindle speed of 35rpm, and a slurry flow rate of 250ml/min. A spectrometry (OPTI2600 from Thermal Wave Co.) for the thickness measurement of silicon oxide and surface profiler(P2h from KLA-Tencor Co.) for the measurement of step height were employed. RESULTS AND DISCUSSION Figure 1 shows remain thickness of oxide at the elevated area in STI patterned wafer as a function of CMP time. In the beginning of polishing with silica slurry, remain oxide thickness was decreased rapidly due to a high pressure focused on the elevated area. However, in high selective CMP with ceria slurry, remain oxide thickness is gradually decreased even at the beginning of polishing. This mean that the removal rate drop in the initial stage of CMP is a characteristic polishing behavior of ceria slurry.
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