A Silicon Nanopore Device for On-Chip Patch Clamp Measurements of Single Ion Channel Activity
- PDF / 538,644 Bytes
- 4 Pages / 612 x 792 pts (letter) Page_size
- 40 Downloads / 163 Views
A Silicon Nanopore Device for On-Chip Patch Clamp Measurements of Single Ion Channel Activity L. Plucinski,1,2 Y. Chen,1,2 and G. L. Liu1,2 1 University of Illinois Department of Electrical and Computer Engineering, 306 N Wright St, Urbana, IL, 61801 , U.S.A. 2 University of Illinois Micro and Nanotechnology Laboratory, 208 N Wright St, Urbana, IL, 61801, U.S.A.
ABSTRACT Here we present a novel silicon nanopore planar patch clamp chip for single ion channel screening. We fabricate our devices using a combination of KOH and metal-assisted etching. Electrical characterization shows that the shunt capacitance and access resistance are within the accepted ranges for single channel recordings. In order to test our devices, we cultured and differentiated human neuroblastoma SH-SY5Y cells on chip. We reliably obtained a high resistance seal to the cell membrane and report single ion channel activity recordings. INTRODUCTION Novel devices for high-throughput electrophysiology will have a large impact on drug discovery research because voltage-dependent, receptor-activated, and second-messengeractivated ion channels are all attractive therapeutic targets.1 Current methods for ion channel screening primarily use fluorescent indicator dyes. Electrophysiology-based approaches, such as the patch clamp, would allow for high-information recordings while controlling the cell membrane voltage. However, the patch clamp depends on the formation of a high resistance seal between a micropipette and cell membrane, which is laborious and mechanically unstable. This has inspired the development of planar patch clamp chips, which consist of micron-sized apertures in materials such as glass or silicon.2 Recordings with these devices are currently done in the whole-cell configuration.3 Here we present a silicon nanopore planar patch clamp chip that is ideal for measuring single channel activity because sub-micron apertures minimize cell capacitance, reduce cell membrane damage, and allow for work with smaller cells. SILICON NANOPORE FABRICATION Our wafer-scale silicon nanopore fabrication method, as shown in Figs. 1 and 2, combines KOH and metal-assisted etching. We begin with a 3” [100] silicon wafer with a thickness of 380µm and deposit 1µm of silicon nitride on the front and back. Using photolithography, we pattern circular windows with diameters of 575µm spaced such that each device is a square chip with a side length of 1cm. The exposed silicon nitride in the windows is etched to the bare silicon by reactive ion etching (RIE). KOH etching in a 30% KOH solution for 2 hours and 15 minutes forms silicon membranes with a thickness of 60±14µm. We then deposit 1µm of silicon dioxide on the front for additional passivation and pattern 3µm windows in the oxide, which are also etched to the bare silicon using RIE. Silver nanoparticles are formed on the back of the silicon membrane through the reduction of a 1mM silver nitrate solution with a 0.5%
hydrofluoric acid (HF) solution. Metal-assisted etching occurs in an aqueous solution that is 12.5
Data Loading...
