Bias Stress Induced Instabilities in Amorphous Silicon Nitride / Crystalline Silicon and Amorphous Silicon Nitride / Amo

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BIAS STRESS INDUCED INSTABILITIES IN AMORPHOUS SILICON NITRIDE / CRYSTALLINE SILICON AND AMORPHOUS SILICON NITRIDE / AMORPHOUS SILICON STRUCTURES

J. Kanicki, C. Godeta and A.V. Gelatosb IBM Research Division Thomas J. Watson Research Center P.O.Box 218, Yorktown Heights, NY 10598 ABSTRACT The effects of positive and negative bias stress on hydrogenated amorphous silicon nitride / crystalline silicon and hydrogenated amorphous silicon nitride / hydrogenated amorphous silicon (a-Si:H) structures are investigated as a function of stress time, stress temperature and stress bias. It is shown that in both structures bias stress induces a parallel shift of the C-V (capacitance-voltage) characteristics. For a given stress bias the direction of the C-V shift depends on the sign of the applied stress voltage, while the magnitude of the C-V shift depends on stress time and temperature. In addition, it is shown that positive bias stress slightly increases the number of localized states in the a-Si:H mobility gap, but negative bias stress does not. These results lead us to conclude that the C-V shift is not induced by dangling bond defects in a-Si:H but rather by carrier trapping in the insulator. INTRODUCTION

A number of investigations of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) have demonstrated that the application of a dc gate voltage over a prolonged period of time induces a shift of the transistor threshold voltage [1]. Depending on the magnitude of the applied electric field across the gate insulator two basic mechanisms have been proposed to explain this shift [2]. One is trapping of charge into the gate dielectric [2,3]. The second contribution to the instabilities comes from changes in the density of states of the amorphous silicon itself [1,4]. The weak Si-Si bonds model [5] or defect pool model [6] could explain the dangling bond states creation in the a-Si:H space charge region. In the defect pool model, the negative bias stress is removing states from the lower part of the gap and creating states in the upper part of the gap; the positive bias stress does the opposite i.e., the gap states are created in the lower part of the gap. It should be noted that the time and temperature dependence for each mechanism is different [7]. The state creation process is thermally activated and has a power law dependence on stress time. The charge trapping process is virtually temperature independent and has a logarithmic stress time dependence [6,7]. In spite of the central importance of the a-Si:H defects, no one has succeeded to show explicitly whether defect states are created or not by bias stress in a-Si:H space charge region. In this paper we report on a comprehensive investigation of the effects of positive (electron accumulation) and negative (hole accumulation) bias-temperature stress on hydrogenated amorphous silicon nitride / crystalline silicon and amorphous silicon nitride / hydrogenated amorphous silicon devices, as a function of stress voltage, stress time, and stress temperature. We a