Characteristics of Arsenic Doped Polycrystalline Silicon-Gate Capacitors After Rapid Thermal Processing
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CHARACTERISTICS OF ARSENIC DOPED POLYCRYSTALLINE SILICON-GATE CAPACITORS AFTIER RAPID THERMAL PROCESSING R. ANGELUCCI*, C.Y. WONG, J.Y.-C. SUN, G. SCILLA, P.A. McFARLAND, A.C. MEGDANIS IBM Thomas J. Watson Research Center, Yorktown Heights, N.Y. 10598 E. LANDI CNR-LAMEL Institute, 40126 Bologna, Italy ABSTRACT The feasibility and advantages of using rapid thermal annealing to achieve a proper n+ polysilicon work function are demonstrated. Our data shows that RTA can be used to activate arsenic in the polysilicon gate after a regular furnace anneal or to diffuse and activate arsenic without any prior furnace anneal. Interface states and fixed charges due to RTA can be annealed out at 500"C for 30 min in forming gas. New insights into the diffusion, segregation, and activation of As in polysilicon during furnace and/or rapid thermal annealing have been obtained. INTRODUCTION Dual polysilicon work functions (n+-polysilicon for n-channel and p+-polysilicon for p-channel transistors) have been shown to have definite advantages in certain submicrometer device applications [1]. In order to obtain reproducible work functions as well as prevent the depletion layer formation in the polysilicon near the gate oxide interface, dopants must diffuse through the polysilicon layer and become electrically active at the polysilicon/SiO 2 interface with sufficiently high concentration. Recently rapid thermal annealing (RTA) has been extensively studied as an alternative to the conventional furnace annealing for minimizing the heat treatment necessary to diffuse and activate dopants [2). In this paper, we present evidence supporting the feasibility of using RTA, with or without previous furnace annealing, to diffuse and activate arsenic through the polysilicon and obtain degenerately doped polysilicon at the oxide interface. We report our results on dopant diffusion and activation as a function of polysilicon deposition temperature. Chemical and carrier concentration profiles through polysilicon, along with structural characterization and flat band voltage measurements will be compared for these polysilicon films. EXPERIMENTAL Aluminum contacted polysilicon-gate capacitors were used in all our studies. After cleaning, 7nm dry oxide was grown on boron-doped 1 ohm-cm single crystalline silicon wafers, followed by 250nm low pressure chemical vapor deposited (LPCVD) polysilicon at 610*C unless otherwise specified. In some cases, the polysilcon film was deposited at 540*C for comparison in terms of grain structure effects. Polysilicon was doped by arsenic ion implantation through 10nm thermal oxide at 30 KeV and 2x 1015cm-2 . To redistribute and activate the dopant atoms, different combinations of furnace annealing and RTA (AG * Permanent address: CNR-LAMEL Institute, 40126 Bologna, Italy Mat. Res. Soc. Symp. Proc. Vol. 106. -1988 Materials Research Society
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Associates Heatpulse 2146, W-Halogen lamp) in nitrogen were performed. Aluminum dots were evaporated on one half of each wafer after removing the thermal oxide on top of polysilic
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