Chemical Vapor Deposition of Copper for Multilevel Metallization
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silicon oxide insulators has served the microelectronics industry for several generations. Although recent developments in low-temperature processing and highaspect ratio gap filling and planarization will suffice to extend aluminum's usefulness for an additional one or two generations, aluminum-based interconnections are becoming primary limiting factors in chip performance because of: (1) material reliability issues related primarily to aluminum's relatively high resistivity (2.65 /xflcm), low melting point (which is responsible for its high reactivity with silicon), and poor electromigration resistance as device features are scaled down; and (2) process reliability issues related to the increased limitations of presently-used physical vapor deposition (PVD) processes, of which sputtering is the most popular, to meet the increasingly stringent requirements of new MLM schemes. Sputtering is known to produce nonconformal coverage, which leads to thinning at the edges and walls of vias and trenches, and to key holes in the vias. Copper metallization with silicon dioxide or lower dielectric constant insulators will become necessary for delivering the requisite performance and circuit densities. Copper, because of its low resistivity (1.67 jiiflcm) and enhanced resistance to electromigration, is a promising choice as a ULSI metallization material. Its growth can be achieved by many techniques, but chemical vapor deposition (CVD) offers several advantages over traditional "line of sight" PVD techniques such as evapora-
tion or sputtering. CVD involves transporting volatile metal-organic precursors, which contain the elemental constituents of the target material, to a reaction zone. The deposition on a heated substrate occurs either through reactions in the gas phase leading to species which condense on the substrate to form the desired film, or reactions of adsorbed species on the substrate surface, which catalyzes or aids the decomposition into the desired film and gaseous by-products that are continuously pumped out. A unique advantage of CVD is its ability to involve the substrate surface in the deposition reaction, potentially leading, under the proper conditions, to a conformal blanket or selective metal growth. This feature is essential for producing three-dimensional multilevel structures which contain interconnections in the vertical direction through vias and holes in the dielectric. Another important characteristic of CVD is that it can produce metals on substrates of complex shape and form at growth rates much higher than the minimum acceptable in the electronic device industry. In addition, it can grow metal thin films at reduced temperatures, as low as 150°C, with no need for postdeposition annealing. This is necessary to minimize the effects of interdiffusion and to allow the growth of abrupt multilayered structures. It is relatively simple and controllable, and leads to good adherence, high uniformity over a large area, and reduced susceptibility to interfacial mixing and cross-contamination effects
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