Detailed Investigation of GaN Metal-Insulator-Semiconductor Structures by Capacitance-voltage and Deep Level Transient S
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Detailed Investigation of GaN Metal-Insulator-Semiconductor Capacitance-Voltage and Deep Level Transient Spectroscopy Methods
1108-A09-24
Structures
by
Junjiroh Kikawa1, Yuki Horiuchi1, Eiji Shibata1, Masamitsu Kaneko1, Hirotaka Otake2 Tatsuya Fujishima2, Kentaro Chikamatsu2, Atsushi Yamaguchi2 and Yasushi Nanishi1 1 Ritsumeikan Univ., 2ROHM CO. LTD., E-mail: [email protected]
ABSTRACT Detailed investigation of electrical characteristics of GaN metal-insulator-semiconductor capacitors (MISC) with a SiN insulating layer deposited by electron cyclotron resonance (ECR) plasma-assisted sputtering method has been performed focusing on a trap behavior by utilizing capacitance-voltage (CV) method and deep level transient spectroscopy (DLTS). From the CV measurements, hysteresis and ledge were clearly observed in the high frequency region, and they had dispersions of both frequency and sweep rate of gate bias. Traps and a slow minority carrier recombination rate in depletion layer are responsible to them. The observation of CV curves of the samples with different SiN thicknesses suggests that the traps which build ledge mainly exist in SiN bulk rather than SiN/GaN interface. INTRODUCTION Most AlGaN/GaN hetero-junction field effect transistors (HFET) exhibit normally-on operation because the high-density two-dimensional electron gas exists under the gate. For power and consumer applications, however, normally-off operation is required for the safety of products. Several techniques for the normally-off operation of the AlGaN/GaN HFET have been reported, such as using a thin AlGaN barrier layer, a recessed gate structure, a fluoride-based plasma treatment and using a non-polar GaN channel [1]. Metal insulator semiconductor (MIS) structure transistors are powerful candidates for normally-off operation [2]. One critical issue of such devices is establishment of a method to achieve sufficient quality of a MIS structure in order to realize a low on-resistance and a high breakdown voltage. For this purpose, SiN and SiO2 have been often used as an insulator. However, we observed poor capacitance-voltage (CV) curves, that is, hysteresis and ledge exist in these devices. It is considered that fabrication process might be not optimized yet.
In this paper, we report on a characteristics of CV curves of metal insulator semiconductor capacitances (MISC) with a SiN insulator deposited by ECR plasma-assisted sputtering method. We estimate the energy levels of traps related hysteresis and ledge, and discuss their origin. EXPERIMENTAL The GaN epitaxial layers were grown on c-plane sapphire substrates by conventional low-pressure metal organic chemical vapor deposition. A1μm undoped-GaN buffer layer was deposited and followed by a deposition of 1.5μm GaN layer with an electron density of around 1×1017cm-3. MISC structure was fabricated by utilizing typical lift-off techniques. At first, a Ti/Al/Ni/Au (10/40/20/80nm) was evaporated by electron beam (EB) deposition as an ohmic electrode, followed by sintering at 625 °C for 5 min in
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