Effect of Annealing Temperature on SiC Wafer Bow and Warp
- PDF / 128,075 Bytes
- 6 Pages / 612 x 792 pts (letter) Page_size
- 43 Downloads / 822 Views
1069-D07-23
Effect of Annealing Temperature on SiC Wafer Bow and Warp Xueping Xu, and Chris Martin Wide Bandgap Materials Group, II-VI Incorporated, 20 Chapin Road, Suite 1005, Pine Brook, NJ, 07058 ABSTRACT Single-side polished silicon carbide wafers could exhibit large bow and warp due to the presence of mechanical damage on the unpolished surface. In this study, we investigated the effect of thermal annealing on the wafer bow. Two commercial-grade, double-side polished 3” 6H SiC wafers with the bow less than 5 µm were lapped using 12 µm diamond grit. One wafer was lapped on the C-face and another on the Si-face. The lapped wafers were subjected to annealing in vacuum at temperatures between 500°C and 2040°C. The wafer bow and x-ray rocking curves were measured prior to annealing and after each annealing step in order to evaluate the extent of the surface damage and degree of healing. Thermal annealing led to a decrease in the wafer bow and sharpening of the x-ray rocking curves. However, the wafer bow generated by lapping was not completely removed until annealing temperature reached ~2000°C. INTRODUCTION Silicon carbide (SiC) is a wide bandgap semiconductor for applications in high frequency and high power devices [1]. Commercial-size SiC single crystals are grown by the technique of physical vapor transport (PVT). In this technique, the solid SiC source is vaporized at a high temperature and the Si- and C-containing volatile molecular species are transported to the seed driven by the temperature gradient in the growth system [2]. The grown SiC boule is subsequently oriented and sliced into wafers, which are polished. Depending on the customer requirements, SiC wafers can be double-side or single-side polished. Typically, single-side polished wafers have higher bow and warp due to the presence of a layer of surface damage on the unpolished wafer face. High wafer bow and warp are undesirable for epitaxial growth and device processing. It is known that thermal annealing can lead to a stress reduction in SiC wafers. Wafer stress and associated wafer warp and bow are results of the internal stress from crystal growth and the stress from mechanic processes such as slicing, lapping and polishing. Okojie et al reported thermoplastic deformation of SiC wafers during annealing to 900°C [3-5]. Wafer bow was reduced during heating, but remained same during cool down. In this work, we studied the effects of annealing on bow and surface damage of single-side polished 6H SiC wafers. We extended the annealing temperature to 2040°C and used wafers with low internal stress in order to explicitly evaluate the effect surface damage.
EXPERIMENTAL Two 3” commercial-grade, semi-insulating 6H SiC wafers were used in this study [6]. The 375 µm thick wafers were double-side polished with the bow and warp below 5 µm, indicative of low internal stress. The wafers were lapped using 12 µm diamond slurry: one wafer (wafer A) was lapped on the silicon face and the other (wafer B) on the carbon face, with the total material removal of 25 µm
Data Loading...
