Effect of Elevated Implant Temperature on Amorphization and Activation in As-implanted Silicon-on-insulator Layers
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1070-E05-02
Effect of Elevated Implant Temperature on Amorphization and Activation in As-implanted Silicon-on-insulator Layers Katherine L. Saenger1, Stephen W. Bedell1, Matthew Copel1, Amlan Majumdar1, John A. Ott1, Joel P. de Souza1, Steven J. Koester1, Donald R. Wall2, and Devendra K. Sadana1 1 IBM Semiconductor Research and Development Center, T.J. Watson Research Center, Yorktown Heights, NY, 10598 2 IBM Microelectronics Division, Hopewell Junction, NY, 12533 ABSTRACT The ion implantation steps used in fabricating field effect transistors in ultrathin (6 to 30 nm) silicon-on-insulator (UTSOI) substrates present many challenges. Deep source/drain (S/D) implants in UTSOI layers are a particular concern, since it can be difficult to implant the desired dose without amorphizing the entire SOI thickness. In a first study, we investigated the effect of implant temperature (20 to 300 oC) on the sheet resistance (Rs) of 28 nm thick SOI layers implanted with As+ at an energy of 50 keV and a dose of 3 x 1015 /cm2, and found Rs values after activation sharply lower for samples implanted at the highest temperature. In a second study, on 8 nm thick SOI layers implanted with As+ at an energy of 0.75 keV and doses in the range 0.5 to 2 x 1015 /cm2, the benefits of the elevated implantation temperature were less clear. Explanations for these effects, supported by microscopy, medium energy ion scattering (MEIS), and optical reflectance data, will be discussed. INTRODUCTION Historically, most performance improvements in semiconductor field-effect transistors (FETs) have been achieved by scaling down the relative dimensions of the device. Implementation of this approach for silicon-on-insulator (SOI) technology entails continued reduction of the SOI layer thickness. However, ion implantation doping of ultrathin (6 to 30 nm) silicon-on-insulator (UTSOI) layers presents some unique challenges that are not present with thicker SOI layers and bulk substrates. In particular, it can be difficult to perform deep source/drain (S/D) implants with high doses of heavy ions such as As+ without amorphizing the entire SOI thickness. In the absence of some crystalline Si to act as a seed or template, the amorphized Si (a-Si) will be unable to recrystallize by solid phase epitaxy (SPE), instead recrystallizing with a polycrystalline Si (poly-Si) morphology by a random nucleation and growth process. In addition, the implanted dopants in UTSOI layers are in close proximity to both the top SOI interface with the overlying screen oxide and the bottom SOI interface with the underlying buried oxide (box) layer. Such interfaces are a known route to dopant loss [1], but the bottom SOI interface in thicker SOI layers is typically too far from the implanted dopant to be much of a concern. It has long been known that the threshold dose for amorphization increases with increasing substrate temperature [2]. This effect is due to the fact that the crystalline-toamorphous transition depends on a competition between the temperature-independent rate at which da
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