Electrical and electrothermal properties of few-layer 2D devices
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S.I. : T WO-DIMENSIONAL MATERIALS
Electrical and electrothermal properties of few‑layer 2D devices Arnab K. Majee1 · Cameron J. Foss1 · Zlatan Aksamija1 Received: 29 June 2020 / Accepted: 19 August 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract While two-dimensional (2D) materials have emerged as a new platform for nanoelectronic devices with improved electronic, optical, and thermal properties, and their heightened sensitivity to electrostatic and mechanical interactions with their environment has proved to be a bottleneck. Few-layer (FL) 2D devices retain the desirable thinness of their monolayer cousins while boosting carrier mobility. Here, we employ an electrothermal model to study FL field-effect devices made from transition metal dichalcogenides M oS2 and W Se2 and examine the effect of both electrical and thermal interlayer resistances, as well as the thermal boundary resistance to the substrate, on device performance. We show that overall conductance improves with increasing thickness (number of layers) at small gate voltages, but exhibits a peak for large gate voltages. Joule heating impacts performance due to relatively poor thermal conductance to the substrate and this impact, along with the location of the hot spot in the FL stack, varies with carrier screening length of the material. We conclude that coupled electrothermal simulation can be employed to design FL 2D devices with improved performance. Keywords Transition metal dichalcogenides · Heat dissipation · Thermal boundary conductance
1 Introduction The persistent downscaling of nanostructures, such as electronic devices, sensors, NEMS, or nanocomposites, increases the surface-to-volume ratio and introduces atomicscale disorder at boundaries and interfaces. To avoid these issues, the nanoelectronic community has turned to intrinsically two-dimensional (2D) material platforms. 2D materials, including graphene [1] and transition metal dichalcogenides [2, 3](TMDCs, e.g., M oS2, WSe2, etc.), have extraordinary structural, mechanical, and physical properties. Devices made up of single-layer (SL), few-layer (FL) 2D materials, and their heterostructures hold tremendous potential for next-generation nanoelectronic applications, including low-power devices and optoelectronics [4–6]. While 2D materials provide intriguing opportunities for future device applications, thermal management in them can become a challenge. Heat removal in 2D FETs is mainly cross-plane through the substrate, owing to the small thermal healing length (a measure of lateral heat spreading, around * Zlatan Aksamija [email protected] 1
Electrical and Computer Engineering, University of Massachusetts, Amherst 01003, USA
100 nm) [7] and large lateral/vertical aspect ratio. Current in FL graphene, MoS2, and WSe2 is vertically localized in a few layers [8–10], causing a hot spot, and the location and spread of this hot spot depend on gate voltage via the carrier concentration in each layer. At the same time, the thermal boundary co
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