Electrical and Physical Characterization of Ultrathin Silicon Oxynitride Gate Dielectric Films Formed by the Jet Vapor D
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INTRODUCTION The shrinkage in device dimensions with each successive generation of CMOS technology necessitates a concurrent scaling in the gate dielectric thickness. The scaling of thermally grown Si0 2 , the current choice for the gate dielectric, approaches a fundamental limit due to large leakage currents arising from direct tunneling [1-3]. Since tunneling currents will scale exponentially with further thickness reductions, Si0 2 is likely to be phased out beyond the 100 =n technology generation [4]. For the near-term gate dielectric solution, efforts are being focused on ultra-thin silicon nitride or oxynitride films [4]. In recent years, a variety of techniques [5-9] for oxynitride/nitride film deposition have been tested to check their viability for replacing Si0 2. The possibility of using silicon nitride to extend the scaling limit of gate dielectric due to nitride's lower tunneling current was first demonstrated with the Jet Vapor Deposition (JVD) technique in 1995 [10]. This technique, developed by researchers at Yale University and Jet Process Corporation, employs supersonic jets of a light carrier gas like helium to transport depositing vapor from the source to the substrate to produce different films [11, 12]. In this paper, we carry out an extensive material and electrical characterization of an ultrathin, gate quality silicon oxynitride film deposited by the JVD process. 307
Mat. Res. Soc. Symp. Proc. Vol. 592 © 2000 Materials Research Society
EXPERIMENT
Processing Details Two hundred mm, CZ (100) oriented p/p+ epitaxial silicon wafers with an epi-layer doping concentration of 2 x 10' 5/cm 3 were shipped to Yale University for gate oxynitride deposition following a dilute HF and RCA clean. The wafers were either bare (for fabricating capacitor dot structures and for carrying out materials analysis) or patterned up to the pre-gate stage on the standard 250 nm NMOS transistor process flow in the Advanced Tool Development Facility (ATDF) at SEMATECH. Upon arrival at Yale, they were cleaned using a buffered oxide etch (BOE) dip for 10 seconds and a DI rinse. Soon thereafter, a silicon oxynitride film was deposited on these wafers using the Jet Vapor Deposition (JVD) technique. This technique utilizes a supersonic jet of 1-e as the carrier gas to rapidly transport reactive nitrogen species, generated in a plasma, and silane molecules to the substrate where they react to form silicon nitride [11]. The eventual film formed is an oxynitride due to the presence of residual gas in the reaction chamber. An equivalent oxide thickness (EOT) of 1.8 - 2.0 nm was targeted during the deposition process. Following film deposition, the wafers were returned to SEMATECH in a sealed box, where they were subjected to different anneals. The blank wafers were split into five sets - one set received no anneal while the other four were annealed under one of the following conditions: 1. Furnace anneal for 30 minutes in water vapor at 520 °C, 2. Furnace anneal for 30 minutes in N2 at 800°C, 3. Fumnace anneal for 5 minutes i
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