Electronic Transport Across Porous/Crystalline Silicon Heterojunctions
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Electronic Transport Across Porous/Crystalline Silicon Heterojunctions Md. N. Islam, Sanjay K. Ram and Satyendra Kumar Department of Physics, Indian Institute of Technology, Kanpur – 208 016, INDIA ABSTRACT Al/PS junctions are non-rectifying and quasi-linear whereas Al/PS/c-Si junctions are weakly rectifying. The rectifying behavior is due to PS/c-Si heterojunction. The diode ideality factor (n) is about 8 for bias ≤0.5 V (about 50 for bias ≤5 V) at forward bias and nearly 1 for ≤0.5 V at reverse bias. As the temperature decreases, n at both forward and reverse biases increases. Different current transport mechanisms are found to be operating across the PS/c-Si junctions under forward and reverse biases. The barrier height measured from I-V data for ≤0.5 V is higher for forward bias than that for reverse bias. For high reverse biases (>5 V), the reverse current increases slowly following ln(I) ∝ V1/2 law. I-V results on PS/c-Si junctions are explained by a multi tunneling-recombination model for forward bias while carrier generation-recombination and barrier lowering effects for reverse bias. INTRODUCTION The discovery of visible luminescence from porous silicon (PS) layers [1] has drawn a great interest as a potential optoelectronic material compatible to silicon technology. A typical PS based light emitting device structure [2] employs PS layer sandwiched between the substrate crystalline silicon (c-Si) and the top metal contact. The understanding of electronic transport properties of porous silicon (PS)/crystalline silicon (c-Si) heterojunctions, is crucial in improving the electroluminescence property of metal/PS/c-Si structures. The property of a heterojunction is determined by an interplay of the band-edge offsets and the density of defect states (DOS) within the bandgap. In order to analyse the electrical behavior of PS/c-Si heterojunctios, we studied the current-voltage (I-V) characteristics of a series of PS/c-Si junctions as a function of temperatures. EXPERIMETAL DETAILS Thick PS layers were prepared by electrochemically anodizing boron doped (100) Si wafers having resistivity of 6-10 Ω.cm using HF (40-48 wt.%) and C2H5OH (99.9%) (1:1 by volume). Prior to anodization, an Ohmic back contact was provided for uniform anodization by evaporating a thin aluminum layer, followed by annealing at 450oC for 30 min. A current density of ~10 mA.cm−2 was used for 150 min anodization to get thick PS layers. PS samples were prepared under ambient light. Samples were rinsed in deionized water and then in methanol and soaked in propanol for few minutes to minimize the structural damage during drying. For electrical measurements, rectangular aluminum pads (2×1 mm2) were thermally evaporated on top of the porous layers at a pressure of 10−5 Torr in glancing geometry with an angle of 30o between molecular beam and the sample normal. This precaution is found to prevent shorting of contact between evaporated metal and the silicon skeleton (especially for thick PS layers). Thus
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