Embedded System Design
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Embedded System Design by
PETER MARWEDEL University of Dortmund, Germany
A C.I.P. Catalogue record for this book is available from the Library of Congress.
ISBN-10 ISBN-13 ISBN-10 ISBN-13 ISBN-10 ISBN-13
0-387-29237-3 (PB) 978-0-387-29237-3 (PB) 1-4020-7690-8 (HB) 978-1-4020-7690-9 (HB) 0-387-30087-2 ( e-book) 978-0-387-30087-0 (e-book)
Published by Springer, P.O. Box 17, 3300 AA Dordrecht, The Netherlands. www.springeronline.com
Printed on acid-free paper
All Rights Reserved © 2006 Springer No part of this work may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, microfilming, recording or otherwise, without written permission from the Publisher, with the exception of any material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Printed in the Netherlands.
This book is dedicated to my family.
Contents
Preface
xiii
Acknowledgments
xvii
1. INTRODUCTION
1
1.1
Terms and scope
1
1.2
Application areas
5
1.3
Growing importance of embedded systems
8
1.4
Structure of this book
9
2. SPECIFICATIONS
13
2.1
Requirements
13
2.2
Models of computation
16
2.3
StateCharts
18
2.3.1
Modeling of hierarchy
19
2.3.2
Timers
23
2.3.3
Edge labels and StateCharts semantics
24
2.3.4
Evaluation and extensions
26
2.4
General language characteristics
27
2.4.1
Synchronous and asynchronous languages
27
2.4.2
Process concepts
28
2.4.3
Synchronization and communication
28
vii
viii
EMBEDDED SYSTEM DESIGN
2.4.4
Specifying timing
29
2.4.5
Using non-standard I/O devices
30
2.5
SDL
30
2.6
Petri nets
36
2.6.1
Introduction
36
2.6.2
Condition/event nets
40
2.6.3
Place/transition nets
40
2.6.4
Predicate/transition nets
42
2.6.5
Evaluation
44
2.7
Message Sequence Charts
44
2.8
UML
45
2.9
Process networks
50
2.9.1
Task graphs
50
2.9.2
Asynchronous message passing
53
2.9.3
Synchronous message passing
55
2.10 Java
58
2.11 VHDL
59
2.11.1 Introduction
59
2.11.2 Entities and architectures
60
2.11.3 Multi-valued logic and IEEE 1164
62
2.11.4 VHDL processes and simulation semantics
69
2.12 SystemC
73
2.13 Verilog and SystemVerilog
75
2.14 SpecC
76
2.15 Additional languages
77
2.16 Levels of hardware modeling
79
2.17 Language comparison
82
2.18 Dependability requirements
83
Contents
ix
3. EMBEDDED SYSTEM HARDWARE
87
3.1
Introduction
87
3.2
Input
88
3.3
3.4
3.2.1
Sensors
88
3.2.2
Sample-and-hold circuits
90
3.2.3
A/D-converters
91
Communication
93
3.3.1
Requirements
94
3.3.2
Electrical robustness
95
3.3.3
Guaranteeing real-time behavior
96
3.3.4
Examples
97
Processing Units
98
3.4.1
Overview
98
3.4.2
Application-Specific Circuits (ASICs)
100
3.4.3
Processors
100
3.4.4
Reconfigurable Logic
115
3.5
Memories
118
3.6
Output
120
3.6.1
D/A-converters
121
3.6.2
Actuators
122
4. EMBEDDED OPERATING SYSTEMS, MIDDLEW
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