Extracting the Device Parameters from Organic Thin Film Transistors
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0965-S06-12
Extracting the Device Parameters from Organic Thin Film Transistors Eung Seok Park, Pil Soo Kang, and Gyu Tae Kim School of Electrical Engineering, Korea University, Anam-dong, Seongbuk-gu, Seoul, 136701, Korea, Republic of
ABSTRACT Organic thin film transistors(OTFTs) were simulated by a SPICE model adopted in hydrogenated amorphous TFTs(a-Si:H). The gate voltage-dependent mobilities were assumed to fit the representative current-voltage characteristics. The optimal fitting procedures were suggested to compare the experimental data with the mathematical expressions used in the amorphous TFTs. Each SPICE parameter explains the gate dependent mobilities in OTFTs originating from the distribution of trap sites for the hopping conduction.
INTRODUCTION As the performance of organic thin film transistors(OTFTs) has substantially improved, it is expected that they will be more widely used as practical devices. Modeling of OTFTs by circuit simulation tools such as SPICE is needed so that OTFTs could be properly applied to the integrated circuit electronics. Although the electrical transport characteristics are not fully understood, it is generally accepted that the model used for hydrogenated amorphous silicon(aSi:H) transistors could be employed. The low carrier mobilities in OTFTs is due to the large concentrations of traps and disorders that limit the charge-carrier transport similar with the case of a-Si:H transistors[1]. However, a disadvantage of this model is that there are so many empirical parameters that extracting parameters is not straightforward. A useful method for extracting parameters from the current-voltage characteristics is suggested. THEORY Charge transport in amorphous solids is limited by localized states. The Fermi level at the insulator-semiconductor interface will shift by the applied gate voltage, which can fill more localized states. Therefore, the trapping rate will decrease, giving the increase of the mobility. The mobility can be related to the gate voltage with a power law dependence: γ
⎛ V −V ⎞ µ = µ0 ⎜ gs t ⎟ ⎝ VAA ⎠
(1)
where µ 0 is a constant mobility at band edge, γ and VAA empirical parameters named power law mobility parameter and characteristic voltage for field effect mobility, Vgs the gate voltage and
Vt the threshold voltage[2]. Assuming the mobility is dependent on the gate voltage, the mobility will change along the channel as the effective gate voltage is varied between the drain region and the source region with a non-zero drain source bias. Therefore, one of the methods to estimate a gate voltage-dependent mobility is to use drain-source current measured in the linear regime, where the constant mobility can be assumed along the channel owing to the low drain-source voltages[3]. Including the parasitic resistances at the source/drain contact, the drain-source current in the linear regime where the drain-source voltage is kept small can be expressed as following: Vds 1
Id =
ε ox W tox L
µ (Vgs − Vt )
(2) +R
where ε ox is the insulator permittivity, tox
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