Fabrication of Nanostructures of Low-Resistivity Silicon Wafer with High-Aspect-Ratio Using Carbon Nanotube Probe of Sca
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Fabrication of Nanostructures of Low-Resistivity Silicon Wafer with High-AspectRatio Using Carbon Nanotube Probe of Scanning Tunneling Microscope Akihito Matsumuro1 and Makoto Takagi1 1
Department of Mechanical Engineering, Aichi Institute of Technology, Toyota 470-0392, Japan
ABSTRACT Various nanostructures with high-aspect-ratio formed in a low-resistivity silicon wafer by the nano-processing using a carbon nanotube (CNT) probe of a scanning tunneling microscope (STM) have been investigated. The multi-wall CNT probes were obtained with our original pulling-method from CNT dispersion liquid. Nanostructures of point configurations (pit and mound) and line configurations were obtained at the constant tunneling current of 0.1 nA by controlling the bias voltages up to 10 V, processing times up to 300 s and scanning speeds of probe up to 480 nm/s for a line configuration. The aspect-ratio of the pit configuration fabricated at the bias voltage of 3 V increased about 6 times in proportion to the increase in processing time. Remarkable influence of the bias voltage on the configurations indicated that there exists a threshold bias voltage for the transition from the pit configuration to the mound one between 3 V and 5 V, and the aspect ratio of all nanostructures fabricated by the CNT probe were larger than those by a conventional tungsten probe. Finally, cross-sectional TEM observations were also applied to clarify the difference in the formation mechanisms between the pit configuration and the mound configuration. The TEM image of the pit configuration showed neither dislocations nor remarkable strains existed, but in the case of the mound shape TEM analysis indicated the existence of single crystalline silicon region solidified with atomic defects under the mound configuration. Therefore the drastic change of the configurations was attributed to the changes of the atomic-scale microstructures by applying the bias voltages. INTRODUCTION The fabrication of high-aspect-ratio nanoelectromechanical systems and nanodevices are becoming increasingly very important. The nanofabrication technique that employs a scanning tunneling microscope (STM) has been demonstrated by several researchers for a wide range of sizes: from atom manipulation [1] to several tens of nanometers [2]. However, the fabrication of high-aspect-ratio nanostructures is not yet realized. This is because the fabrication configuration depends on the probe configuration. A probe that has both nanometric dimensions and a high aspect ratio is required. We focus on a CNT with electrical conductivity. We have investigated the optimum conditions for the fabrication of the nanoscale pit with high-aspect-ratio of Au thin films using a CNT probe [3]. In this study, we established the fabrication method for highaspect-ratio nanostructures of low-resistivity silicon wafer which is very important for applications using a multi-wall CNT probes, and clarified the relationship between the fabrication conditions and the configuration of the nanostructures. Furthermore, the
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