Fabrication of One-dimensional Silicon Nano-wires Based on Proximity Effects of Electron-beam Lithography

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A8.6.1

Fabrication of One-dimensional Silicon Nano-wires Based on Proximity Effects of Electron-beam Lithography S. F. Hu1* and C. L. Sung National Nano Device Laboratories, Hsinchu 30078, Taiwan 1 Taiwan Spin Research Center, National Chung Cheng University, Chia-Yi 621, Taiwan ABSTRACT One-dimensional silicon nanowire structures have been successfully made by using the proximity and accumulation effects of electron-beam (e-beam) lithography. Wire structures are fabricated in a thin poly silicon layer on a silicon substrate with a 400 nm buried SiO2. Measurements of the current-voltage characteristics at various temperatures from 4 K up to 300 K show significant nonlinearities and single-electron effect behavior. The blockade size is significantly affected by thermal effects, oscillations of the blockade, and the conductivity dependence on the gate potential. Keywords: A. Nanostructures; B. Nanofabrications

INTRODUCTION The ultra small size and low power consumption features of single-electron transistor (SET) make the promising base elements for future microelectronic and nanoelectronic circuits. The main limitation, which tends to hinder progress in this direction, is the requirement of very small structural elements for the devices. For room temperature operation, the dimensions should be smaller than 10 nm, which is below the resolution limit of modern nano-lithography processes. Among the various kinds of SETs, silicon (Si)-SET has the widest range of applications because it can be made using the fabrication process for silicon large-scale integrated (LSI) circuits. The major problem is how to make SETs be equipped with electrical characteristics desired. Significant success has been achieved in the development of Si-based SETs operating at relatively high temperatures [1-4]. Moreover, logic elements [5,6] and memory modules[7,8] based on single-electron effects have been fabricated from silicon. The fine structure is typically formed by conventional lithography. Electron-beam lithography is the most commonly used technique in this field, and many researchers have been investigating how to use it to make nanopatterns. However, the silicon wires for SETs formed by conventional e-beam lithography are not small enough and the size cannot be controlled very well because of the proximity and accumulation effects of e-beam lithography. Nevertheless, we report on the fabrication of SETs from silicon point-contact made using proximity and accumulation effects of e-beam lithography. The one-dimensional silicon point-contact structures show significant nonlinearities and conductance peaks suggestive of single-electron behavior.

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A8.6.2

The devices are fabricated based on the appropriate choice of the electron-beam dose and of the pattern development time. The substrates used in our studies are SIMOX wafers with p-type Si substrates, featuring a thin 60 nm silicon layer on top of a 400 nm buried SiO2. The top 60 nm silicon layer is doped by phosphorous ion implantation at a dose of 2 x 1014 ions