Fabrication of PLZT Film-on-Foil Dielectric Sheets for Embedded Passives
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1113-F03-15
Fabrication of PLZT Film-on-Foil Dielectric Sheets for Embedded Passives1
Beihai Ma, Manoj Narayanan, and U. (Balu) Balachandran Energy Systems Division, Argonne National Laboratory, Argonne, IL 60439, U.S.A.
ABSTRACT Ferroelectric film-on-foil capacitors hold special promise to replace discrete passive components in the development of electronic devices that require greater performance and smaller size. We have deposited Pb0.92La0.08Zr0.52Ti0.48O3 (PLZT) films on base metal foils to form film-on-foil capacitor sheets that can be embedded into printed circuit boards. The rootmean-square surface roughness was determined to be ≈3 nm for 1.15-µm-thick PLZT films on LaNiO3-buffered Ni foils. The following dielectric properties were measured: relative permittivity of ≈1300 and dielectric loss (tan δ) of ≈0.05, leakage current density of 6.6 x 10-9 A/cm2 at 25°C and 1.4 x 10-8 A/cm2 at 150°C, and mean breakdown strength >2.5 MV/cm. A remnant polarization (Pr) of ≈33 µC/cm2 and coercive field strength (Ec) of ≈50 kV/cm were observed with a maximum voltage of 300 V applied during the P-E loop measurement. The energy storage capability of the dielectric film is ≈45 J/cm3. Keywords: dielectric property; PLZT film; ceramic capacitor; energy density; breakdown strength. INTRODUCTION Advanced power electronics require capacitors that operate under high voltage and yet have minimal footprint. This need can be realized by embedding high-permittivity ceramic film capacitors into a printed circuit board (PCB). This technology would free up surface space, reduce the number of solder joints on the PCB, increase device reliability, and minimize electromagnetic interference and inductance loss. Although the technology has primarily received attention for decoupling capacitors in microelectronic applications, it can also be extended to high-power applications, such as plug-in hybrid electric vehicles. However, the integration of high-permittivity films into PCBs is complicated by the incompatibility in the processing conditions for the different materials involved. Polymer layers in a PCB cannot withstand the high temperatures (600-700°C) required for tailoring the ceramic film dielectrics to 1
The submitted manuscript has been created by UChicago Argonne, LLC, Operator of Argonne National Laboratory (“Argonne”). Argonne, a U.S. Department of Energy Office of Science laboratory, is operated under Contract No. DE-AC02-06CH11357. The U.S. Government retains for itself, and others acting on its behalf, a paidup nonexclusive, irrevocable worldwide license in said article to reproduce, prepare derivative works, distribute copies to the public, and perform publicly and display publicly, by or on behalf of the Government.
obtain the desired crystalline structures. Development of these crystalline structures is extremely challenging at reduced processing temperatures [1]. Success has been demonstrated through a film-on-foil approach where the ceramic dielectrics are first coated on a thin base metal foil by chemical solution d
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