Strategy for the Integration of PLZT Thin Films on Base-Metal Foils for High Voltage Embedded Passives
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0969-W03-07
Strategy for the Integration of PLZT Thin Films on Base-Metal Foils for High Voltage Embedded Passives Beihai Ma, U. (Balu) Balachandran, David Y. Kaufman, and Krishna Uprety Energy Systems Division, Argonne National Laboratory, Argonne, IL, 60439 ABSTRACT Evolution of electronic devices towards higher performance and smaller size requires the passive components to be embedded within a printed wire board (PWB). A “film-on-foil” approach is the most viable fabrication method. A high permittivity of lead lanthanum zirconate titanate (PLZT) thin film was coated on nickel foil by chemical solution deposition. Such a prefabricated capacitor sheet can be embedded into a PWB. However, formation of a parasitic low-permittivity interfacial layer of nickel oxide during thermal processing of the PLZT films considerably reduces the capacitance density. To eliminate this parasitic effect, conductive buffer layer of lanthanum nickel oxide (LNO) was coated by chemical solution deposition on nickel foil. We produced PLZT film-on-foil capacitors with capacitance densities as high as 1.5 µF/cm2 and breakdown field strength >1.4 MV/cm. With the desirable volumetric character, PLZT film-on-foil capacitors hold particular promise for use in high voltage embedded passives. INTRODUCTION Embedding high-permittivity (high-κ) dielectrics into a low-temperature-processed printed wire board (PWB) to replace discreet surface-mounted capacitors is advantageous in electronics miniaturization, device reliability, and manufacturing cost reduction. It also holds particular promise to applications that require high capacitance density and high volumetric efficiency, such as for use in power electronics in plug-in hybrid electric vehicles (PHEV). Embedded capacitors can be located directly underneath active devices, greatly reducing component footprint, dramatically shortening interconnect lengths, reducing parasitic inductive losses and electromagnetic interference, and allowing higher frequency operation. Reliability is improved because the number and size of interconnections are reduced, as solder joints that often are most susceptible to failure are no longer needed [1]. Photolithographic methods in combination with etching and metallization steps can be used to synthesize the needed capacitive elements and interconnections rapidly and in large quantity [2]. While this technology has primarily received attention for decoupling capacitors in microelectronic applications, it can also be extended to higher voltage applications. Historically, the integration of high-κ dielectric materials into PWBs has been thwarted by the incompatibility of the respective processing conditions. Polymer layers in a PWB cannot withstand the high temperatures (600-800°C) required for processing the ceramic dielectric films to obtain the desired crystalline structure. Many efforts have been made to reduce film growth temperatures to levels that are compatible with relatively refractory organic materials. Unfortunately, these efforts significantly compromise
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