FIB-TEM Characterization of Locally Restricted Implantation Damage
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FIB-TEM Characterization of Locally Restricted Implantation Damage Heinz D. Wanzenboeck1, Stefan Harasek1, Wolfgang Brezna1, Alois Lugstein1, Helmut Langfischer1, Emmerich Bertagnolli1, Ulf Grabner2, Gerold Hammer2, Peter Pongratz2 Vienna University of Technology 1 Institute for Solid State Electronics, Floragasse / E362; A-1040 Vienna, AUSTRIA 2 Institute for Solid State Physics, Wiedner Hauptstrasse, A-1040 Vienna, AUSTRIA ABSTRACT Imaging critical features by using transmission electron microscopy (TEM) or scanning electron microscopy (SEM) provides a versatile approach for nanostructure characterization. The combination of focused ion beam (FIB) technology for exposing defective sites beneath the surface is shown. Reliability testing and defect analysis by localized characterization of multilayered structures is demonstrated. TEM-imaging of a transistor gate with a locally confined radiation damage demonstrates target preparation by FIB yielding high-resolution TEM samples. The TEM imaging requires a longer sample preparation but provides high image quality (TEM). Investigation of materials previously processed with FIB revealed amorphization damage by the high energetic Ga-ion beam. This damage layer with a thickness in the range of 50 to 100 nm was confirmed in simulation. This disadvantageous damage by amorphization originating from FIB preparation of the cross-section could be removed by soft sputtering with a 250 V Ar+ ion beam. This combined method using FIB for microsample preparation and TEM for imaging and analysis was proven to be a powerful tool the exploitation of nanostructured devices and for defect analysis on a highly localized scale. INTRODUCTION Progress in microelectronics is driven by continuous miniaturization of semiconductor devices. In mass fabrication 180 nm feature size nowadays represents the state of the art and research already focuses on sub-100 nm lateral structuring. With semiconductor devices material layers such as gate oxides have now already reached a thickness range as low as 2 nm. This is a challenge for the reliability of those processes. Slight variations of the thickness of the gate oxide may result in an electric breakdown and malfunction of the entire circuitry. Hence, for inspection and defect analysis an imaging technique for structures down below the nm-range must be used. Only few methods can provide sub-nm resolution, but probing with an electron beam has proven successful. With scanning electron microscopy (SEM) features in the nm-range may be resolved. Transmission electron microscopy (TEM) allows high resolution down to the sub-nm range [1]. However, samples must be very thin to allow high transparency and high contrast and conventional preparation of TEM samples is a time-consuming process. With the multilayered circuitry the feature under investigation is often buried in depth. Therefore, the cross-section of samples needs to be investigated. Local milling by a FIB allows for target preparation of cross-sections or TEM lamellae with nm accuracy [2],[3
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