Formal Specification Level Concepts, Methods, and Algorithms
This book introduces a new level of abstraction that closes the gap between the textual specification of embedded systems and the executable model at the Electronic System Level (ESL). Readers will be enabled to operate at this new, Formal Specification L
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rmal Specification Level Concepts, Methods, and Algorithms
Formal Specification Level
Mathias Soeken • Rolf Drechsler
Formal Specification Level Concepts, Methods, and Algorithms
123
Mathias Soeken University of Bremen/DFKI Bremen, Germany
Rolf Drechsler University of Bremen/DFKI Bremen, Germany
ISBN 978-3-319-08698-9 ISBN 978-3-319-08699-6 (eBook) DOI 10.1007/978-3-319-08699-6 Springer Cham Heidelberg New York Dordrecht London Library of Congress Control Number: 2014952327 © Springer International Publishing Switzerland 2015 This work is subject to copyright. All rights are reserved by the Publisher, whether the whole or part of the material is concerned, specifically the rights of translation, reprinting, reuse of illustrations, recitation, broadcasting, reproduction on microfilms or in any other physical way, and transmission or information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed. Exempted from this legal reservation are brief excerpts in connection with reviews or scholarly analysis or material supplied specifically for the purpose of being entered and executed on a computer system, for exclusive use by the purchaser of the work. Duplication of this publication or parts thereof is permitted only under the provisions of the Copyright Law of the Publisher’s location, in its current version, and permission for use must always be obtained from Springer. Permissions for use may be obtained through RightsLink at the Copyright Clearance Center. Violations are liable to prosecution under the respective Copyright Law. The use of general descriptive names, registered names, trademarks, service marks, etc. in this publication does not imply, even in the absence of a specific statement, that such names are exempt from the relevant protective laws and regulations and therefore free for general use. While the advice and information in this book are believed to be true and accurate at the date of publication, neither the authors nor the editors nor the publisher can accept any legal responsibility for any errors or omissions that may be made. The publisher makes no warranty, express or implied, with respect to the material contained herein. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Preface
This book addresses the important problem of formal verification at the very first stage of the design flow for complex hardware and software systems. System designers are interested in finding bugs as early as possible in the design flow in order to meet strict and important time-to-market constraints. However, the initial system description is usually provided in terms of textual specifications which do not directly allow the application of formal verification tools. Thus far, the first point for some formal analyses appears during the implementation phase; however, lots of effort have been spent until that point. Two major contributions are provided in this book to solve this
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