GISAXS study on the annealing behavior of sputtered HfO 2 thin films
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GISAXS study on the annealing behavior of sputtered HfO2 thin films G. S. Belo1, F. Nakagomi2, P. E. N. de Souza2, S. W. da Silva2 and D. A. Buchanan1 1
Electrical and Computer Engineering, University of Manitoba, Winnipeg MB, R3T 5V6, Canada 2 Instituto de Física, Universidade de Brasília, Brasília DF 70910-900, Brazil Abstract Grazing Incidence Small-Angle X-ray Scattering (GISAXS) is a versatile technique for the analysis of nano and micro thin films surfaces. The scattering data depend strongly on the form and distribution of the scattering objects. In the present work GISAXS is used to study hafnium dioxide (HfO2) thin films deposited by magnetron sputtering using different deposition processes and post-deposition annealing conditions. Two distinct types of 15 nm thick samples were produced using different sputtering targets and different gas mixtures. The GISAXS results show that the ellipsoids that compose the thin films present a reduction in their size for both samples sets. For the sputtered Hf metal target samples, the ellipsoid diameter value shifted from 9 nm (as-deposited) to 6 nm following a 800 oC thermal treatment. For the sputtered HfO2 target samples the diameter value shifts from 19 nm (as-deposited) to 3 nm after a 800 oC anneal in oxygen. The size distribution, for both sets of samples, follows a Gaussian distribution function. Introduction In CMOS technology large numbers of MOSFET's are integrated onto a small chip. To continue scaling and increase performance, the number and density of transistors on each chip requires the reduction of the individual MOSFET device dimensions. This continuous scaling has driven the SiO2 gate dielectric below 2 nm causing the exponentially increasing gate leakage current to become unmanageable [1-5]. Many materials have been studied to replace SiO2 as the gate dielectric and hafnium dioxide (HfO2) has been found to be one of the most promising. Hafnium dioxide have been found suitable to replace SiO2 because their relatively high dielectric constant (~25), reasonable conduction band offsets (~1.5 eV), thermal stability and for the most part compatibility with CMOS technologies [6,7]. However, many of the physical and electrical properties of this material are not well understood. Differences in these characteristics are very dependent upon the deposition method and subsequent post-processing used. One of the greatest of implementing these films is the difficulty in achieving a good Si/high-κ interface along with a high quality thin film with few defects. Many deposition methods have been used to deposit high-κ dielectric thin films and these include physical sputtering and atomic layer deposition (ALD) [8]. The advantages of ALD include good thickness control, high conformality and a low temperature deposition. However, ALD typically has a low deposition rate which is a direct consequence of the atomic layer by layer film growth. For most ALD processes only a fraction of a monolayer is deposited per cycle [9]. While ALD produces precise monolayer control, the
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