Guest Editorial Note: Special Issue on Applied Reconfigurable Computing
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Guest Editorial Note: Special Issue on Applied Reconfigurable Computing Georgios Keramidas 1 & Nikolaos Voros 2 & Michael Huebner 3 & Diana Goehringer 4 Published online: 29 August 2020 # Springer Science+Business Media, LLC, part of Springer Nature 2020
1 Description of the Topic Reconfigurable computing platforms offer increased performance gains and energy efficiency through coarse-grained and fine-grained parallelism coupled with their ability to implement custom functional, storage, and interconnect structures. The growth of the capacity of reconfigurable devices, such as FPGAs, has created a wealth of new research opportunities and intricate engineering challenges. Within the past decade, reconfigurable architectures have evolved from a uniform sea of programmable logic elements to fully reconfigurable systems-on-chip (SoCs) with integrate multipliers, memory elements, processors, and standard I/O interfaces. One of the foremost challenges facing reconfigurable application developers today is how to best exploit these novel and innovative resources to achieve the highest possible performance and energy efficiency; additional challenges include the design and implementation of next-generation architectures, along with languages, compilers, synthesis technologies, and physical design tools to enable highly productive design methodologies. The purpose of this special issue is to provide an insight into current research and development in aspects related to
* Georgios Keramidas [email protected] Nikolaos Voros [email protected] Michael Huebner [email protected] Diana Goehringer [email protected] 1
Aristotle University of Thessaloniki, Thessaloniki, Greece
2
University of Peloponnese, Tripoli, Greece
3
Brandenburg University of Technology, Cottbus, Germany
4
Technische Universität Dresden, Dresden, Germany
reconfigurable computing. This special issue includes six papers that were presented in the 2018 edition of the International Symposium of Applied Reconfigurable Computing (May 2018 in Santorini, Greece). The six articles were appropriately selected (based on their quality) in order to cover various topics of the Symposium. The articles have undergone rigorous peer-review according to the journal’s high standards.
2 Articles of this Special Section The article “An FPGA-based Accelerated Optimization Algorithm for Real-Time Applications” studies and proposes an FPGA-based acceleration of a low-complexity optimization algorithm, namely Big Bang-Big Crunch (BB-BC). The proposed technique describes a novel, fully parameterized and pipelined FPGA design of the BB-BC algorithm and a parallel scheme which integrates several BB-BC engines to improve performance. The article “VerCoLib: Fast and Versatile Communication for FPGAs via PCI Express” presents a highly configurable hardware interface that supports DMA-based connections to a host system as well as direct communication between multiple FPGAs. The proposed implementation offers unidirectional channels to connect FPGAs, al
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