Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs Kanupriya Gulati Sunil P. Khatri This book deals with the acceleration of EDA algorithms using hardware platforms such as Custom ICs, FPGAs and GPUs. Widely applied CAD algorithms are stu
- PDF / 2,653,458 Bytes
- 207 Pages / 492.615 x 752.985 pts Page_size
- 47 Downloads / 251 Views
Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs
1 23
Hardware Acceleration of EDA Algorithms
Kanupriya Gulati ยท Sunil P. Khatri
Hardware Acceleration of EDA Algorithms Custom ICs, FPGAs and GPUs
123
Kanupriya Gulati 109 Branchwood Trl Coppell TX 75019 USA [email protected]
Sunil P. Khatri Department of Electrical & Computer Engineering Texas A & M University College Station TX 77843-3128 214 Zachry Engineering Center USA [email protected]
ISBN 978-1-4419-0943-5 e-ISBN 978-1-4419-0944-2 DOI 10.1007/978-1-4419-0944-2 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2010920238 c Springer Science+Business Media, LLC 2010 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
To our parents and our teachers
Foreword
Single-threaded software applications have ceased to see significant gains in performance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a significant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, field-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose singlethreaded CPU. We study applications which are used in key time-consuming steps of the VLSI design flow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the programming model used for interfacing with the GPUs. As an example of a control-dominated EDA problem, Boolean satisfiability (SAT) is accelerated using the following hardware implementations: (i) a custom IC-based hardware approach in which the traversal of the implication graph and conflict clause
Data Loading...
