High-Density, Low-loss MOS Decoupling Capacitors integrated in a GSM Power Amplifier
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B6.3.1
High-Density, Low-loss MOS Decoupling Capacitors integrated in a GSM Power Amplifier
F. Roozeboom, A. Kemmeren, J. Verhoeven, E. van den Heuvel, H. Kretschman and T. Frič 1 Philips Research Labs, Prof. Holstlaan 4, 5656 AA Eindhoven, The Netherlands 1 Philips Semiconductors, Gerstweg 2, 6534 AE Nijmegen, The Netherlands
ABSTRACT High-density MOS capacitors have been fabricated with ~ 30 nF/mm2 specific capacitance on highly-doped Si-wafers with arrays of macropores with ~ 2 µm diameter. Using the Bosch process [1] these pores were dry-etched to depths of ~ 30 µm or more. The enlarged Si-surface thus obtained serves as a substrate for capacitors fabricated by fully MOS-compatible processing. Wafers were fabricated with a top electrode of poly-Si and Al and ‘ONO’ (i.e. oxide / nitride / oxide) dielectric stacks showing 7-10 MV/cm electrical breakdown field and leakage < 1 nA/mm2 @ 20 V. These wafers were thinned to 380 µm and sawn into dies, representing 40 nF capacitors. Typically low loss factors such as ESR < 50 mΩ and ESL < 20 pH and resonance frequencies of ~ 0.1 GHz were found for 40 nF capacitor dies. Next, 40 nF dies were mounted by wire bonding on Al2O3 or laminate substrate as supply-line decoupling capacitors in complete GSM power amplifier test modules. RF decoupling and transmission were measured and compared to identical test modules with conventional discrete ceramic capacitors. The MOS capacitors showed very efficient decoupling, resulting in superior signal stability as measured in the 0 – 1 GHz range (less noisy, free from oscillations). The new capacitor is very suitable for integrated decoupling purposes, e.g. supplyline decoupling in RF wireless communication and analog and mixed-signal systems.
INTRODUCTION In an earlier paper [2] we reported on the superior decoupling properties of standalone high-density (25 to 100 nF/mm2) MOS capacitors in porous silicon, made by wet- and dry etching. This new capacitor concept had lower series resistance (ESR) and superior low series inductance (ESL), compared to currently used ceramic decoupling capacitors. This leads to far more effective suppression of transmission in the GHz range than with conventional discrete ceramic SMD capacitors. This paper reports on the superior decoupling of our MOS capacitor made in highly-doped dry-etched macroporous silicon compared to ceramic SMD capacitors, as tested in actual RF-devices, i.e. fully integrated as power supply-line decoupling capacitors in typical power amplifier test modules of a GSM cellular phone.
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EXPERIMENTAL Lithography and dry etching of pore pattern. Highly-doped (arsenic) Si (100) substrate wafers with a resistivity of 1 to 5 mΩ·cm and a diameter of 150 mm were used. These wafers were covered with a hard mask layer of 1.0 µm thermal oxide and 1.3 µm photoresist on top. For the lithographic step a mask with a hexagonal array of circular openings with 1.5 µm diameter and 3.5 µm spacing was used. The wafers were etched at room temperature in an STS-HRE™ reactor using the socalled ‘Bo
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