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A23.5.1

High-Performance Amorphous Silicon Emitter for Crystalline Silicon Solar Cells T.H. Wang, E. Iwaniczko, M.R. Page, Q. Wang, D.H. Levi, Y. Yan, Y. Xu, and H.M. Branz National Renewable Energy Laboratory, 1617 Cole Blvd., Golden, CO 80401, USA

ABSTRACT Thin hydrogenated amorphous silicon (a-Si:H) layers deposited by hot-wire chemical vapor deposition (HWCVD) are studied for use as the emitter in silicon heterojunction (SHJ) solar cells on p-type crystalline silicon wafers. Low interface recombination velocity and high open-circuit voltage are achieved by a low substrate temperature (200°C) which improves dopant activation and other properties. A prolonged atomic H pretreatment to clean the c-Si surface is actually detrimental because it creates additional defects in the c-Si lattice. However, a brief H pretreatment is beneficial and may render the intrinsic interlayer unnecessary. The n-type a-Si:H thickness must be limited to ~5 nm to minimize current loss, because the phosphorous doped aSi:H layer has significant absorption in the usable solar spectrum. Using the optimized a-Si:H emitter, we obtain efficiency of nearly 17% on planar float-zone (FZ) silicon and 15% on planar Czochralski (CZ) silicon substrates with aluminum back-surface-field (Al-BSF) and contacts. INTRODUCTION The commercial production of high-efficiency and rather simple a-Si:H/c-Si heterojunction with intrinsic thin layer (HIT) solar cells by Sanyo [1] has promoted widespread interest in understanding both the device physics and the a-Si:H material properties critical for achieving high-performance devices. The heterojunction solar cell is also a good solution to the problems associated with high-temperature diffused junction formation because a-Si:H can be deposited at temperatures below 250ºC. At low temperature, it is easier to preserve a high minority carrier lifetime in the substrate and to avoid wafer warping in the ever-thinner c-Si substrates. The amorphous layers used in Sanyo’s HIT cells based on n-type Si wafers are deposited by plasma-enhanced chemical vapor deposition (PECVD). In principle, HWCVD could be superior to PECVD for silicon heterojunction solar cells because of higher deposition rates, reduced ion bombardment of the base wafer, and high densities of atomic hydrogen (H) generation that may passivate the wafer interface region. We focus our work on the passivation effects of different i- and n-layers on p-type silicon wafers, using HWCVD for the entire emitter deposition process. Effective a-Si:H/c-Si interfaces that allow efficient transport of charge carriers with minimal recombination loss is a prerequisite for high-performance heterojunction solar cells. A high-performance emitter is characterized by a low surface recombination velocity and a high open-circuit voltage. To eliminate complications introduced by a backside heterojunction [2], we use a standard Al-BSF and contact. Our focus is on understanding and optimizing the emitter --- including the interface treatment, a-Si:H material deposition, and absorptio