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switches for high resolution imaging arrays. The carrier mobility of this material, however, is low. This drawback limits its application in high speed peripheral driver circuits. The development of low temperature poly-Si by laser crystallization has brought attention to integration of large-area electronics with peripheral drivers. The field effect mobility of the poly-Si TFT is two orders of magnitude higher than that of a-Si TFTs. The high mobility makes poly-Si TFTs attractive for the peripheral drive circuitry. However, poly-Si TFTs have a considerably higher leakage current compared with a-Si TFTs. A high leakage current through a pixel switch results in a poor dynamic range for an imaging system. In order to achieve a reasonable imaging dynamic range, the leakage current through the pixel switch has to be low enough to hold the charge on the pixel capacitor during one imaging frame time. This requirement becomes more stringent for a high resolution array, where the pixel capacitance is small. It is difficult for poly-Si TFTs to meet this requirement for high resolution imaging arrays. A natural extension of a-Si and poly-Si technology is the combination of a-Si and poly-Si devices on the same substrate to improve the system reliability and to reduce the packaging cost for the large-area electronics. This goal can be approached by making a-Si and poly-Si TFTs on the same substrate separately or monolithically. The advantages of the monolithic fabrication are fewer processing steps and easier inter-device connections. Figure 1 shows a-Si and poly-Si TFTs fabricated by a monolithic process based on a modification of the a-Si TFlT fabrication process. The distance between the two devices is about 10 gim. Mat. Res. Soc. Symp. Proc. Vol. 507 ©1998 Materials Research Society

Figure 1. Optical microscope photograph of an a-Si TFT and a poly-Si TFT built side by side by a monolithic fabrication process. The distance between the two devices is about 10pnm.

Applications of the hybrid a-Si and poly-Si structure extend beyond the combination of aSi and poly-Si TFIrs. For example, doped poly-Si material has low resistivity which can be utilized for a-Si TFT source and drain contacts [2]. In the conventional bottom-gate a-Si:H TFT fabrication process, the channel region is defined by a self-aligned passivation island, formed by backside lithography. The source/drain contacts are formed by depositing doped a-Si:H with subsequent patterning. Since it is difficult to selectively etch doped a-Si over the intrinsic a-Si, the top passivation island is utilized as the etch-stop to form the source/drain electrode. As a result, there are overlaps of the source/drain electrodes with the channel region, causing an additional parasitic capacitance between the gate and the source/drain electrodes. The high parasitic capacitance results in a feed-through voltage on the pixel electrode, producing image flicker and sticking in the display application. Also, the overlap introduces a variation of the parasitic capacitance among the pixe