Impacts of Back Surface Conditions on the Behavior of Oxygen in Heavily Arsenic Doped Czochralski Silicon Wafers
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E9.18.1
Impacts of Back Surface Conditions on the Behavior of Oxygen in Heavily Arsenic Doped Czochralski Silicon Wafers Q. Wang, Manmohan Daggubati, Hossein Paravi, Rong Yu1 and Xiao Feng Zhang1 Fairchild Semiconductor Corporation, 3333 West 9000 South, West Jordan, UT 84088 1 Materials Sciences Division, Lawrence Berkeley National Laboratory, Berkeley, CA 94720 ABSTRACT The precipitation of interstitial oxygen (Oi) in heavily arsenic doped Czochralski (CZ) silicon wafers (As-wafer) has been studied for both polysilicon and damaged back surfaces. After annealed at 1200°C for 45 minutes and 950°C for 15hrs sequentially, the As-wafers with polysilicon show no Oi precipitation in the bulk while polyhedral Oi precipitates are observed at the interface between polysilicon and the silicon substrate. They exhibit a habit plane of {100}. The lack of the Oi precipitation in the bulk may reduce the total gettering efficiency of the polysilicon layer on the As-wafer. The same annealing led to rod-like SiOx precipitates in the wafers with damaged back surface. These precipitates extended about 1um into the bulk and had a habit plane of {111}. This morphology has high interfacial energy and is only possible when strain relief is dominant. The Oi outdiffusion has been observed to be same for both backside surface conditions and is only determined by annealing process.
INTRODUCTION
The As-wafers are the most commonly used substrates in power MOSFET application [1]. In this application, a polysilicon layer is almost exclusively applied to the back surface of the wafer as extrinsic gettering [2,3]. Little is known how this polysilicon layer will affect the Oi precipitation during the device fabrication. Previous research on the heavily boron and antimony doped CZ silicon wafers shows that the polysilicon back surfaces enhance the Oi precipitation significantly in the vicinity to the back surfaces [4-6]. These precipitates also serve as intrinsic gettering to improve the total gettering efficiency of the polysilicon layer [4,5]. It is important to know if the polysilicon layer in the As-wafer will produce the same effect as in the heavily boron doped silicon wafer for the purpose of both intrinsic gettering and leakage reduction. This paper investigated the Oi precipitation in the As-wafer with polysilicon back surface under a typical power MOSFET thermal budget. Our results show no Oi precipitation in the bulk silicon, significantly different from heavily boron and antimony doped CZ wafers [4,5]. To see if the extrinsic defect will promote the heterogeneous nucleation in the As-wafer, the Oi precipitation in the As-wafer with damaged back surface has also been studied.
EXPERIMENTAL DETAILS The samples used in this study were CZ (100) silicon wafers of 150mm in diameter and doped with arsenic to 2x1019cm-3. The interstitial oxygen concentration was determined to be 7x1017cm-3 by gas fused analysis (GFA) for all the samples. The carbon concentration of all the samples was less than 0.5ppma. Their back surfaces were either coated
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