Instability formation in epitaxial SiGe lines under hydrogen annealing

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Instability formation in epitaxial SiGe lines under hydrogen annealing Birgit Seiss1,2, Georges Brémond2 and Didier Dutartre1 1 STMicroelectronics, 850 Rue Jean Monnet, 38926 Crolles Cedex, France 2 Université de Lyon, Institut des Nanotechnologies de Lyon (INL –UMR 5270) CNRS-ECLCPE-INSA Lyon, Bat Blaise Pascal, 7 Av. Jean Capelle, 69621 Villeurbanne Cedex, France ABSTRACT The influence of film thickness and line width on the morphology of epitaxial SiGe was studied after an annealing step. The morphology of 5 nm and 19 nm thick SiGe was characterized in 60-490 nm wide lines which were oriented along on Si (001) substrates. We have shown that the annealed SiGe morphology changed significantly as a function of line width and film thickness. Wide lines of 19 nm thick SiGe showed ridge formation; as the line width was decreased the morphology stabilized and then became unstable with the formation of bulges. The morphology of 5 nm thick SiGe consisted of ridges in wide lines, changed to faceted islands in narrower lines and was stable in the narrowest lines. INTRODUCTION Si1-xGex (SiGe) epitaxy is used for various applications in semiconductor industry for many years. In CMOS technology SiGe was first introduced as pMOSFET stressors [1] and is nowadays used as channel material, or - in the form of SiGe:B - as raised sources and drains. With each technology node the dimensions decrease according to the Moore’s law. Currently, epitaxial structures are already very small. As we have shown recently, such small structures, which were faceted after epitaxial growth, became rounded due to exposure to moderate temperatures [2], i.e. they are very sensitive to temperature. This applies to thermal budgets present during as well as after the deposition. In future technology nodes the dimensions will continue to decrease which results in an increasing sensitivity of the morphology towards thermal budgets. Since the morphology may have an impact on the device performance, it is important to better understand the morphology evolution caused by any thermal budget. Therefore, we have studied the influence of line width and film thickness on the morphology of annealed SiGe. EXPERIMENTAL DETAILS Si (001) substrates were patterned by a SiO2 shallow trench isolation (STI) process, routinely used in CMOS technology. The pattern edges were aligned along the crystallographic directions. Fig. 1 shows a schematic cross-section of the patterned substrate.

Figure 1: Schematic cross-section view of the substrate after patterning.

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Before epitaxy, the substrates were cleaned ex situ by a standard HF-last wet clean to remove the surface oxide. This wet clean was followed by an in situ hydrogen bake around 800 °C in the epitaxy chamber to guarantee a good surface quality for the subsequent deposition step. SiGe was deposited by rapid thermal chemical vapor deposition (RTCVD) in an industrial 300 mm epitaxy chamber. The deposition was performed at 600 °C using a mixture of SiH4, GeH4, HCl and H2 gases at a total pressure of 10 Torr. The chosen