• PDF / 1,069,663 Bytes
• 6 Pages / 420.48 x 639 pts Page_size
• 68 Downloads / 280 Views

DOWNLOAD

REPORT

---

KINETICS OF CARRIER-INDUCED METASTABLE DEFECT FORMATION IN HYDROGENATED AMORPHOUS SILICON WARREN B. JACKSON* AND M. D. MOYER* * Xerox Research Center, 3333 Coyote Hill Rd., Palo Alto, CA 94304 ABSTRACT This paper investigates the creation rate of carrier-induced defects in hydrogenated amorphous silicon (a-Si:H) metal-insulator-semiconductor (MIS) devices. The results demonstrate that holes increase the rate of defect formation by over 3 orders of magnitude while electrons increase the rate by roughly an order of magnitude. The carrier-induced defect kinetics, light-induced defect annealing, and decay of excess carriers in doped a-Si:H are quantitatively consistent with dispersive diffusion of hydrogen involved in the metastable process. The results provide strong evidence for the involvement of hydrogen in metastable effects in a-Si:H. INTRODUCTION Hydrogenated amorphous silicon (a-Si:H) exhibits a number of metastable changes induced by illumination, doping, rapid thermal quenching, and the application of a field. The latter effect plays a pivotal role in the stability of amorphous silicon electronic devices. Despite the importance of the metastable phenomena for device stability, the origin of the metastable effects is unclear. The most widely accepted view is that the defects arise from breaking of weak siliconsilicon bonds with the possible involvement of hydrogen to stabilize the bond breaking. 1 -3 Recent work has demonstrated that an electron accumulation layer in the a-Si:H causes defects to be created near the interface within the a-Si:H. 4 -6 This paper investigates the kinetics of these metastable changes in a-Si:H metalinsulator-semiconductor structures. The results indicate that the kinetics of the metastable defect creation process are similar to those found for the other metastable phenomena and that all these phenomena can be quantitatively explained by dispersive hydrogen diffusion. EXPERIMENT The results of this paper were obtained by electrical measurements (capacitance-voltage and current-voltage) on a-Si:H MIS structures which included transistors and capacitors. The MIS devices consisted of the following layers. The gate was formed by degenerated doped crystalline silicon with 75 nm of thermal oxide forming the insulating layer. Then 500 nm of either undoped or 10-5 P a-Si:H was deposited followed by 50 nm of n +. The contact metal was Al and the device area was photolithographically defined. The thermal oxide is known to have very7 few traps and measurements of threshold voltage shifts are less than 50 meV. Additional devices using silicon nitride as the gate dielectric were fabricated using the following layers. First the gate metal was deposited and patterned. Next, a layer of silicon nitride was deposited under conditions which yield good quality nitride (Substrate temperature =300 C, [NH 3 ]/[SiH 4 ] = 9). Following this deposition, a layer of undoped a-Si:H 50-500 nm thick was deposited. The contacts were formed by the deposition of 50 nm of n+ a-Si:H followed by the Al top metalization