Low Temperature PECVD Silicon Oxide For Devices And Circuits On Flexible Substrates
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Low Temperature PECVD Silicon Oxide For Devices And Circuits On Flexible Substrates. Mark Meitine, Andrei Sazonov Electrical and Computer Engineering Department, University of Waterloo, 200 University Ave West, Waterloo, Ontario, N2L3G1, Canada
ABSTRACT The aim of this research is to develop low temperature gate dielectric/passivation layer for µc-Si and poly-Si based devices and circuits compatible with plastic substrates. The PECVD silicon oxide films were fabricated from mixture of silane and nitrous oxide o at 250 C, 120 oC and 75 oC. Helium, argon and nitrogen were used as diluent gases to optimize density, stress, uniformity, and electronic properties. Chemical composition and bonding in the films were studied by FTIR spectroscopy. The absorption peak at 1075-1080 cm-1 observed in the spectrum of each film corresponds to SiO2 stretching mode. No presence of SiH stretching or NH-stretching vibrations was found in the FTIR spectra of the samples. Film uniformity was varied from 1.44 % to 5.60 % for 3”x3” area. Four wafers were processed at the same time. The deposited films have compressive stress varied from 0.063 GPa to 0.117 GPa. Respective film density is in the range from 1.63 g/cm3 to 1.77 g/cm3. The electronic properties were studied on MOS capacitors with 200 nm thick SiOx. The dielectric permittivity was in the range between 2.03 and 3.57. The dielectric breakdown at 9 MV/cm was observed for the films deposited at 120 oC. The films deposited at higher temperatures are characterized by lower leakage current density, which was 3.7.10-10 A/cm2 for the sample deposited at 250 oC, 9.10-9 A/cm2 for 120 oC, and 2.2.10-8 A/cm2 for 75 oC at 5 MV/cm. The a-Si:H based TFTs were fabricated using low temperature oxide as gate dielectric. TFTs demonstrate threshold voltage (3.02 – 4.12 V) and mobility (0.12 – 0.59 cm2/Vs) comparing with those using silicon nitride.
INTRODUCTION The plasma enhanced chemical vapor deposition (PECVD) silicon-based thin film transistor (TFT) fabrication on plastic substrates at low deposition temperatures attracts increasing attention of researchers due to a wide variety of low-cost substrate materials that potentially can be used [1,2]. The demand of increasing the channel mobility requires implementation of poly- or microcrystalline silicon as channel [3]. It is known that the best suitable dielectric material for microcrystalline silicon is silicon oxide SiOx [4] since it provides the best interface properties and has low dielectric permittivity and low mechanical stress [5]. However, high leakage currents due to defects such as pinholes and high porosity of low temperature PECVD SiOx remain the main problem of its technology [5]. Recently it was reported that remote PECVD and electron cyclotron resonance (ECR) can be used for good quality SiOx fabrication [6,7]. On the other hand, direct PECVD is an industrial deposition
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