Mechanisms for Defect Creation and Removal in Hydrogenated and Deuterated Amorphous Silicon Studied using Thin Film Tran
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0910-A19-01
Mechanisms for Defect Creation and Removal in Hydrogenated and Deuterated Amorphous Silicon Studied using Thin Film Transistors Andrew J Flewitt1, Shufan Lin1, William I Milne1, Ralf B Wehrspohn2, and Martin J Powell3 1 Electrical Engineering Division, Cambridge University, 9, J J Thomson Avenue, Cambridge, CB3 0FA, United Kingdom 2 Department of Physics, University of Paderborn, 33095 Paderborn, Germany 3 252, Valley Drive, Kendal, Cumbria, LA9 7SL, United Kingdom
ABSTRACT It has been widely observed that thin film transistors (TFTs) incorporating an hydrogenated amorphous silicon (a-Si:H) channel exhibit a progressive shift in their threshold voltage with time upon application of a gate bias. This is attributed to the creation of metastable defects in the a-Si:H which can be removed by annealing the device at elevated temperatures with no bias applied to the gate, causing the threshold voltage to return to its original value. In this work, the defect creation and removal process has been investigated using both fully hydrogenated and fully deuterated amorphous silicon (a-Si:D) TFTs. In both cases, material was deposited by rf plasma enhanced chemical vapour deposition over a range of gas pressures to cover the α -γ transition. The variation in threshold voltage as a function of gate bias stressing time, and annealing time with no gate bias, was measured. Using the thermalisation energy concept, it has been possible to quantitatively determine the distribution of energies required for defect creation and removal as well as the associated attempt-to-escape frequencies. The defect creation and removal process in a-Si:H is then discussed in the light of these results.
INTRODUCTION The impressively rapid development of the active matrix (AM) liquid crystal display (LCD) over the last ten years has been enabled by hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) technology. Each pixel in an AMLCD display employing this technology includes a bottom gate, inverted staggered structure TFT that controls the electric field across the liquid crystal. The dominance that a-Si:H has achieved in this area is due primarily to the fact that this material can be deposited uniformly over very large areas (upwards of 4 m2) by rf plasma enhanced chemical vapour deposition (rf-PECVD) at glass compatible substrate temperatures. However, the amorphous structure introduces two deleterious consequences. First, the electron mobility in a-Si:H is very low (~1 cm2 V–1 s-1) and therefore the switching speed in a-Si:H TFTs is too slow for them to be used for the display driving circuitry. Second, metastable dangling bond defects exist in the amorphous structure that produce localized electron states in the band gap of this material. When a gate voltage is applied to an a-Si:H TFT, these defect states must be filled with electrons before free carriers can be accumulated in the channel, and this results in the device having a high threshold voltage, Vth. Furthermore, shifting the Fermi level towards the conduction
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