Metal Suppression of Pentacene Grain Growth
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1029-F09-26
Metal Suppression of Pentacene Grain Growth Hsi-wen Lo, and Yu-Chong Tai California Institute of Technology, Pasadena, CA, 91125 ABSTRACT This paper presents the suppressing effect of metal on pentacene grain growth. Thermally evaporated pentacene was deposited onto various substrates, with different metals. The grain diameter was measured via atomic force microscopy or scanning probe microscopy. It was found that for all samples, pentacene showed smaller grain sizes in adjacency of metal while it had larger grain sizes far away from metal. This phenomenon provides an additional support for the fact that transistors have higher mobility for top-contact source and drain configuration than for bottom-contact configuration. INTRODUCTION Pentacene thin-film transistors enjoy much attention in this decade. Generally, pentacene thin-film transistors use either bottom-contact or top-contact electrodes. Transistors using bottom-contact electrodes are reported to have inferior performances to those with top-contact electrodes [1]. Transistors with bottom-contact electrodes are fabricated in such a way that metal is deposited and patterned before pentacene deposition while those with top-contact electrodes are fabricated in reverse order. Hole mobilities are closely related to pentacene grain sizes and grain sizes of pentacene depend heavily on the surface roughness [2]. The fabrication processes of bottom-contact transistors usually make it impossible to achieve flat and smooth enough surfaces to grow large pentacene grains. We found that even when the surfaces are flat and smooth enough, the grains of pentacene are still small if metal is deposited before pentacene, i.e., bottom-contact configuration. Pentacene inside the channels formed by source and drain electrodes has much smaller grains than those far away from metal electrodes. SAMPLE PREPARATION DETAILS To fully explore this effect, we performed two series of experiments. The first one is to investigate effects of different substrates on pentacene grain sizes. The second experiment is to investigate the effects of different metals on pentacene grain sizes. Same metal / different substrates For the first experiment, all these samples start with prime silicon wafers. For oxide samples, silicon wafers first are cleaned with piranha solution for 10 minutes and 1000Å of silicon dioxide is then thermally grown on silicon surface. For PVP samples, Poly-4-vinylphenol or PVP (from Sigma Aldrich), is dissolved in PGMEA to make 10% Wt PVP solution.
This 10%Wt PVP solution is then spin-cast on silicon wafers at 3000 rpm for 40 seconds. After PVP spin-casting, PVP samples are baked at 100oC for 30 minutes. SU8-2 samples preparation starts with dehydrating baking of silicon wafers at 100oC for 5 minutes. SU8-2 from Microchem Corp is spin-cast onto silicon wafers at 3000 rpm for 30 seconds. Soft-bake of SU8-2 samples is done on a hotplate for 1 minute at 60oC, followed by 1 minute at 95oC. UV exposure is done to crosslink SU8-2. Finally, the post exposure bake is don
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