Minority Carrier Lifetime Measurement in Germanium on Silicon Heterostructures for Optoelectronic Applications
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Minority Carrier Lifetime Measurement in Germanium on Silicon Heterostructures for Optoelectronic Applications Josephine J. Sheng1 and Malcolm. S. Carroll Sandia National Laboratories, Albuquerque, NM 87185-1077 U.S.A. 1 Electrical and Computer Engineering, University of New Mexico, Albuquerque, Albuquerque, NM 87131 U.S.A. ABSTRACT In this work, the formation of poly-Ge/Si heterostructures by inductively coupled plasma enhanced chemical vapor deposition (ICP-CVD) is examined as an alternative method to integrate poly-Ge into a CMOS process flow. Poly-Ge on Si heterostructures were formed by either recrystallization of hydrogenated amorphous germanium (α-Ge:H) or direct deposition of poly-Ge. A rapid measure of the suitability for detectors of the different poly-Ge films is the minority carrier recombination lifetime, which can affect dark current, quantum efficiency and overall detectivity. Recombination lifetimes were measured, therefore, in α-Ge:H that was recrystallized using rapid thermal annealing between 400 – 1050ºC in nitrogen ambient. Lifetimes were measured using a non-contact inductively coupled photo-conductance setup and an effective surface recombination velocity is subsequently extracted for each Ge/Si heterostructure describing the integrated recombination in the Ge layer and at the Ge/Si interface, and separates the Ge contribution from recombination in the bulk silicon and at the silicon surface. The effective recombination velocities for the 25 nm Ge layers are found to be ~103-104 cm/s.
INTRODUCTION Demand for low cost and high density near infrared (NIR) detection has motivated the development and use of germanium on silicon (Ge/Si) heterostructures to extend the optoelectronic application of Si technology [1], as well as potentially allowing direct heteroepitaxy of GaAs on Si for laser and solar cells. A common technology challenge is the minimization and monitoring of defects inducing dark current due to the lattice mismatch with the Si substrate. Various techniques are under development to minimize these defects, which include relaxed buffer layers and Ge on insulator methods (e.g., wafer bonding), however, most of these are not easily integratable with standard Si CMOS processing. Ge (p)/Si (n) diodes that include the interface in the junction were recently reported to produce detectors with useful NIR performance despite the defective interface (e.g. Jd=10-15 mA/cm-2, responsivity of 0.75 A/W at 1550 nm with a 200 ps response time), with the advantage of easy integration with other Si devices [2, 3], but this structure assumed an interface recombination velocity of 106 cm/sec reproduced similar dark currents. To reduce dark current for detector sensitivity, it is desirable to develop Ge/Si heterostructures with smaller recombination velocities. Two critical performance parameters are the interface recombination velocity and Ge bulk recombination lifetime, which should be as slow as possible to minimize dark current generation and maximize quantum efficiency. In this paper,
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