Nanocavity Buffer Induced by Gas Ion Implantation in Silicon Substrate for Strain Relaxation of Heteroepitaxial Si1-xGex
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Nanocavity Buffer Induced by Gas Ion Implantation in Silicon Substrate for Strain Relaxation of Heteroepitaxial Si1-xGex/Si Thin Layers Mahfoudh Raïssi1, Gabrielle Regula2, Chokri Hadj Belgacem3, Cyril Coudreau1, Serge Nitsche1, Maryse Lancin2, Bernhard Holländer4, Florent Robert5, Mustapha Fnaiech3, Esidor Ntsoenzok6, and Jean-Louis Lazzari1 1 CRMC-N, UPR-CNRS 7251, Méditerranée and Paul Cézanne Universities, Luminy Campus Case 913, Marseille, 13 288, France 2 TECSEN, UMR 6122, CNRS, Paul Cézanne University, Aix-Marseille III, Escadrille Normandie Niemen, case 262, Marseille, 13 397, France 3 URPS, Department of Physics, University of Monastir, Avenue de l’Environnement, Monastir, 5 019, Tunisia 4 Institute of Bio- and Nanosystems, Semiconductor Thin Films and Device, Ion Technology Division, Forschungszentrum Jülich GmbH, Jülich, 52 425, Germany 5 LAMMI, UMR CNRS 5072, CC15, Montpellier University, Place E. Bataillon, Montpellier, 34 095, France 6 CERI-CNRS, Orléans University, 3A Rue de la Férollerie, Orléans, 45 071, France
ABSTRACT To weight the importance of a nanocavity buffer in a SiGe deposition substrate, some P type (001) FZ Si wafers are implanted (A samples) or not (B samples) at room temperature with 5×1016 He+ cm-2 at 10keV. They are annealed at 700°C for one hour to form a nanocavity layer close to the Si surface. Then, the wafers are carefully chemically cleaned in a clean room to remove both organic and metallic impurities from the surface. They are coated either by 210 nm (A) or 430 nm (B) Si1-xGex (x=0.20±0.02) alloy grown at 575°C for 0.42 hour by low pressure chemical vapor deposition (LP-CVD) with a growth rate of 8 to 17 nm.mn-1. Both kinds of samples are studied by cross section transmission electron microscopy, X-rays diffraction, Rutherford backscattering, atomic force microscopy and etch pit counts. The association of these techniques demonstrates that the thin SiGe layer which is deposited on sample A is fully relaxed and that the threading dislocation density (estimated to hardly reach 4×103cm-2) is at least one order of magnitude lower than what is obtained so far using ion implantation assistance in SiGe layer growth on silicon. The roughness of the SiGe surface is low enough to stand a further Si epitaxy. Nevertheless, the mechanism involved responsible for the threading dislocation annihilation and/or confinement is still unclear. INTRODUCTION SiGe/Si heterostructures deposited on Si(001) substrates are of great interest for both fundamental research and technological applications. Indeed, silicon microelectronic industries and academic laboratories working on electronic, optical and magnetic properties of IV-IV heterostructures are looking for high quality SiGe/Si layers. In addition, SiGe material is nowadays more seriously taken in consideration since most of the semiconductor companies
have largely implemented SiGe in high-speed hetero-junction bipolar transistor (HBT) in CMOS production lines [1-4]. However, applications are not limited to HBTs, and numerous dev
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