Nanopatterned Si(001) Substrates as Templates for Quantum Dot Growth
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P9.17.1
Nanopatterned Si(001) substrates as templates for quantum dot growth A. Ney, C. Pampuch, J. J. Schulz, L. Perepelittchenko, R. Koch Paul-Drude-Institut für Festkörperelektronik, Hausvogteiplatz 5-7, D-10117 Berlin, Germany ABSTRACT It has been shown recently, that the formation of GeSi quantum dots on Si(001) is strongly affected by the surface properties of the substrate. With an increasing number of missing dimer vacancies the growth mode can even change from a Stranski-Krastanow to a kinetic 3D island growth mode. Here we report on atomically resolved scanning tunneling microscopy images of Si(001) after different preparation procedures, namely the conventional high temperature procedure employed for commercial wafers, and Shiraki-type samples which require only low temperature treatment. The latter method yields an atomically flat Si(001) (2 x 1) surface, however, with a defect (ad- and missing dimers) concentration depending on the respective preparation conditions. Furthermore, repeated flashing occasionally yields a (2 x n) reconstructed surface consisting of well-ordered self-assembled trenches of missing dimers, similar to the ones discussed controversially in the previous literature. From our results we can clearly exclude contaminants to be involved. INTRODUCTION The preparation of the Si(001) surface has been subject to intense studies in the last decades because of its paramount importance for device technology. More recently, the Si(001) surface has evolved to a frequently used template for model studies in surface science [1] and thin film growth [2]. The standard technique for preparing high-quality Si(001) surfaces consists of a careful outgassing of the sample holder at 700°C in ultrahigh vacuum (UHV) followed by a short flash to about 1200°C for oxide removal [3]. This procedure routinely yields extended, well-ordered, (1 x 2) reconstructed terraces separated mainly by single steps with low defect concentration [4]. However, for technological applications, lower preparation temperatures are usually preferred in order to suppress dopant diffusion. To this end a number of different chemical etching procedures were proposed in the literature (e.g. the Ishizaka-Shiraki [5] (IS) or the sulfuric acid/peroxide [6] (SP) method), which generate very thin (~1 nm) passivating oxide layers that can be evaporated at temperatures as low as 700 – 800°C. It has been shown that the formation of GeSi quantum dots on low-temperature (LT) prepared Si(001) samples is governed by the respective method of the surface pretreatment and therefore the defect concentration [7]. In this study we present atomically resolved scanning tunneling microscopy (STM) images taken from LT cleaned Si(001) surfaces. Our results confirm that the LT cleaned surfaces are indeed flat and nearly contamination-free. However, the density of intrinsic defects – particularly of dimer vacancies and ad-dimers – is increased compared to the conventional high temperature preparation. In addition, flashing procedures yield a (2 x n) reconstru
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