Nanoporous Materials Integration Into Advanced Microprocessors
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NANOPOROUS MATERIALS INTEGRATION INTO ADVANCED MICROPROCESSORS E. Todd Ryan*, Cathy Labelle*, Satya Nitta†, Nicholas C.M. Fuller†, Griselda Bonilla†, Kenneth McCullough†, Charles Taft†, Hong Lin†, Andrew Simon†, Eva Simonyi†, Kelly Malone†, Muthumanickam Sankarapandian†, Derren Dunn†, Mary Ann Zaitz†, Steve Cohen†, Nancy Klymko†, Bum Ki Moon,‡ Zijian Li,¶ Shuang Li, ¶ Yushan Yan, ¶ Junjun Liu,a and Paul S. Ho a * Advanced Micro Devices, 2070 Route 52, Hopewell Junction, NY 12533 † IBM STG, 2070 Route 52, Hopewell Junction, NY 12533 ‡ Infineon Technologies, 2070 Route 52, Hopewell Junction, NY 12533 ¶ Department of Chemical Engineering, University of California, Riverside, CA 92521 a Laboratory for Interconnect and Packaging, University of Texas, Austin, TX 78712 ABSTRACT Future microprocessor technologies will require interlayer dielectric (ILD) materials with a dielectric constant (κ-value) less than 2.5. Organosilicate glass (OSG) materials must be nanoporous to meet this demand. However, the introduction of nanopores creates many integration challenges. These challenges include 1) integrating nanoporous films with low mechanical strength into conventional process flows, 2) managing etch profiles, 3) processinduced damage to the nanoporous ILD, and 4) controlling the metal/nanoporous ILD interface. This paper reviews research to maximize mechanical strength by engineering optimal pore structures, controlling trench bottom roughness induced by etching and understanding its relationship to pore size, repairing plasma damage using silylation chemistry, and sealing a nanoporous surface for barrier metal (liner) deposition. INTRODUCTION Nanoporous low dielectric constant (low-κ) materials are critical for advancing microprocessor performance along the path of Moore’s Law. Today, resistance-capacitance (RC) delay in back-end-of-line (BEoL) interconnects can limit microprocessor operation, and this necessitates improvements in both transistor and interconnect performance. BEoL performance enhancement motivated the industry’s transition from Al to Cu interconnects, and it is driving the integration of dielectric materials with lower κ-value.[1] For decades silicon dioxide, which has a κ-value of ~4.0 - 4.2, was the insulator of choice. Fluorine-doped oxide (or fluorosilicate glass, FSG) was then introduced to lower the κ-value to ~3.7, but adhesion and corrosion limited fluorine doping and κ-value reduction. Carbon-doped oxides (or organosilicate glass, OSG) allow for greater carbon doping, and OSG materials with κ ~3.0 are in production now. However future technologies are demanding even lower κ-values. Further reducing the κ-value of OSG materials requires the introduction of air into the film in the form of nanopores. In this paper the term nanoporous is used to generally refer to both microporous ( ~2.6 doping with F or C lowers the density by breaking up the tetrahedral Si-O bonding, and the resulting “pores” are typically less than 1nm in diameter. The porosity is also relatively low. Films with κ < 2.5 requ
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