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1025-B13-05

Nanoscale Analysis of Defects in Semiconductors and Dielectrics by Means of Chargetransient Spectroscopy/microscopy Štefan Lányi1, Vojtech Nádaždy1, Miloslav Hruškovic2, and Ján Hribik2 1 Institute of Physics, SAS, Dúbravská cesta 9, Bratislava, SK-845 11, Slovakia 2 Faculty od Electrical Engineering and Information Technology, Slovak University of Technology, Ilkovicova 3, Bratislava, SK-812 19, Slovakia ABSTRACT We discuss the possibilities of analysis of electrically active defects in semiconductors and dielectrics by means of Isothermal Capacitance-Transient Spectroscopy and Isothermal Charge-Transient Spectroscopy, applied on sub-micrometer scale. While the first of them utilizes the relaxation of the depletion layer, caused by emission of trapped charges and requires sufficient conductivity, the second directly integrates the transient current and can be applied also to low-conductivity materials like dielectrics. Our charge-transient spectrometer achieved resolution of hundreds of electrons but we believe it can be further improved approximately by one order of magnitude. In materials with relatively high defect concentration, using optimal shape of the probe, a resolution on the order of tens of nanometers can be achieved. At low concentrations, e.g. in device quality silicon, a resolution on the hundred-nm level is expected. We present some results obtained on pentacene thin films. INTRODUCTION During the last three decades Deep Level Transient Spectroscopy (DLTS) [1] has become the probably most successful method of analysis of electrically active deep defects in semiconductor structures. The attribute ”deep” refers to defects that create in the gap of the material energy levels deep enough to be neutral under normal conditions but, if ionised, can trap charge carriers for shorter or longer time. They may be intrinsic property of the material, may be introduced intentionally or, in most cases, unwanted impurities or structural defects. They may be located at the surface, at insulator/semiconductor interfaces, at dislocations, grain boundaries or more or less uniformly distributed in the bulk. In DLTS a depletion layer is created in the investigated MOS capacitor, Schottky barrier or pn junction. Then the energy levels that cross the Fermi level become ionized. The structure is forced towards accumulation by pulses superimposed on the bias voltage, enabling charges to get trapped at these levels. After return to depletion the non-equilibrium charges are emitted at a temperature-dependent rate. The relaxation of the depletion layer yields the information on the kind and concentration of defects. It is converted to a spectrum by means of a suitable correlator, in the simplest case by double boxcar sampling, defining a rate window. From the shift in temperature of peak maxima, obtained with different rate windows the activation enthalpy can be obtained. In the original version of DLTS the high-frequency capacitance was used to monitor the relaxation of the depletion layer. A comparably sensitive a