Nanoscale Elastic Imaging of Aluminum/Low-k Dielectric Interconnect Structures
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Nanoscale Elastic Imaging of Aluminum/Low-k Dielectric Interconnect Structures G. S. Shekhawat‡, O.V. Kolosov*, G.A.D. Briggs*, E. O. Shaffer§, S. Martin§, and R. E. Geer‡ ‡
Center for Advanced Thin Film Technology, University at Albany, SUNY, Albany, NY, 12222 *Department of Materials, Oxford University, OX1 3PH UK § The Dow Chemical Company, Midland, MI, 48674 Abstract A new characterization tool based on ultrasonic force microscopy (UFM) has been developed to image the nanometer scale mechanical properties of aluminum/low-k polymer damascence integrated circuit (IC) test structures. Aluminum and polymer regions are differentiated on the basis of elastic modulus with a spatial resolution ≤ 10 nm. This technique reveals a reactive-ion etch (RIE)-induced hardening of the low-k polymer that is manifested in the final IC test structure by a region of increased hardness at the aluminum/polymer interface. The ability to characterize nanometer scale mechanical properties of materials used for IC backend-of-line (BEOL) manufacture offers new opportunities for metrological reliability evaluation of low-k integration processes. Introduction To maintain the continuation of the progressive decrease in integrated circuit (IC) device feature size and the concomitant increase in device performance requires the accelerated integration of low dielectric constant (low-k) materials to replace the SiO2 dielectric. The introduction of such low-k materials reduces the inter- and intra-line capacitance in the IC wiring metallization layers used for IC device interconnections, hence resulting in reduced signal delay. For example, the 1999 International Technology Roadmap for Semiconductors calls for a dielectric constant for interlevel dielectrics (ILDs) between 1.6 and 2.2 at the 100nm device node, i.e. when the critical dimension (CD) of the device structure is equal to 100nm [1]. Currently, the only known solutions for sub-1.9 ILDs are porous materials with substantially reduced rigidity due to pore inclusion. This degraded elastic performance increases the potential for mechanical failure during chemical mechanical planarization (CMP) and thermal cycling of the interconnect levels due to the lower overall internal stress budget manageable by the low-k dielectric. To effectively optimize low-k integration within these constraints, it is necessary to develop a new metrology based on the accurate, nanometer scale measurement of mechanical properties of appropriate low-k interconnect test structures. Pursuant to these goals, findings are presented regarding development of elastic imagingbased metrology for nanometer-scale mapping of mechanical rigidity of damascene processed low-k interconnect structures. Single level damascene aluminum/divinylsiloxane-bisbenzocyclobutene (BCB) test structures were fabricated and planarized. Nanoscale elastic imaging was undertaken via UFM on Al trench and contact pad regions. The acquired image contrast scaled with component rigidity, clearly differentiating metal and dielectric regions. Measured elasti
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