Nonvolatile Carbon Nanotube Memory Device With Molecular Charge Storage
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0938-N07-07
Nonvolatile Carbon Nanotube Memory Device With Molecular Charge Storage Volker J. Sorger, and Zhen Yao Department of Physics, Center for Nano- and Molecular Science and Technology & Texas Materials Inst., University of Texas at Austin, 1 University Station C1600, Austin, Texas, 787120264
ABSTRACT Nanoscale, non-volatile, multi-bit memory devices have been fabricated consisting of carbon nanotube field-effect transistors (CNT-FETs) surrounded by redox active molecules (cobalt porphyrin). Charge was stored in the cobalt center atom of the molecule. Write and erase programming was carried out with back-gate pulses. By varying the back-gate amplitude multilevel memory operation was achieved. Programmed devices were read at zero gate voltage showing distinct logic ON and OFF states at room temperature for several hours. At low temperatures strong increase in retention time was observed and single-electron sensitivity was demonstrated. Charge stability tests show insignificant device change after 105 write and erase cycles. INTRODUCTION With Moore’s Law approaching the point where miniaturization of established “top-down” fabricated devices reaches fundamental limit within the next one or two decades, researchers are avidly pursuing alternatives to fulfill the demand for increasing computing power and information storage. “Bottom-up” approaches to Nanoelectronics can potentially reach far beyond the limits of “top-down” manufacturing. Nanoscale memory devices based on onedimensional channels using charge traps in the underlying Si substrate oxygen-related defect trap sites near the carbon nanotubes (CNTs) or traps at the Si/SiO2 interface for charge storage have been demonstrated.1,2,3 These devices lack the ability to engineer the charge storage mechanism reliably. Memory devices demonstrated in this paper are based on carbon nanotube field effect transistors (CNT-FETs)4 and use thin layers of redox active metal-complex molecules, cobalt porphyrin (CoP), for charge storage acting as a floating gate with naturally occurring tunnel barriers. Writing and erasing of the memory devices were carried out by applying voltage pulses to the back-gate reducing or oxidizing the CoP molecules. Due to the high mobility of a CNTFET,5 the conductance is sensitive to the stored charge in the vicinity of the active channel and hysteresis was observed when the gate was swept back and forth. EXPERIMENT CNT-FETs were fabricated using highly doped Si wafers with 110 nm thermally grown SiO2. Prior to nanotube growth, wafers were annealed under H2 flow (1 l/s) at 700˚C for 1 hour to reduce the trap density at the Si/SiO2 interface.2 Nanotubes were grown using a chemical-
vapor-deposition (CVD) method pioneered by Kong et al.,6 where methane (CH4) gas was used as feedstock yielding high quality single-walled carbon nanotubes (SWNTs). Additional hydrogen (H2) gas was flown while ramping the furnace up to growth temperature (900˚C) and during the cooling down.2 Nanotubes were detected using atomic force microscopy (AFM) and electri
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