Optimization of Samarium Oxide Deposition on Gallium Arsenide
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1108-A10-03
Optimization of Samarium Oxide Deposition on Gallium Arsenide Anthony D. Stewart1, Andrew G. Scheuermann.1, Andy P. Gerger1, Brent P. Gila1, Cammy R. Abernathy1, Stephen J. Pearton1 1
Department of Materials Science & Engineering, University of Florida, Gainesville, FL 32611-4000, U.S.A.
ABSTRACT Samarium oxide (Sm2O3) and samarium gallium oxide (SmxGa1-x)2O3 have been proposed as candidate dielectric materials for the development of gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) technology. Growth of thin (20nm-50nm) Sm2O3 and (SmxGa1-x)2O3 layers on GaAs substrates via plasma-assisted molecular beam epitaxy (MBE) has been performed using a range of growth temperatures and samarium cell temperatures. X-ray photoelectron spectroscopy (XPS) of the deposited films showed evidence of residual Sm metal in the films which decreased with decreasing Sm cell temperature, but was relatively independent of substrate temperature. Stoichiometry of the oxide was found to be independent of substrate temperature, but increased in oxygen to metal ratio as the Sm cell temperature was decreased. Decreasing the Sm cell temperature also suppressed the formation of the monoclinic phase and promoted the growth of the cubic phase. Films grown at higher (500ºC) temperature showed the presence of a crystalline interface, but relatively high surface roughness and the presence of multiple crystalline phases. Current-voltage analysis of one hundred micron diameter MOS diodes showed breakdown fields at 1 mA/cm2 of up to 4.35 MV/cm. Breakdown field was found to decrease with increasing Sm unbonded metal content in the films. The effect of stoichiometry and phase distribution on the interface state density (Dit) and capacitance-voltage behavior of MOS diodes was also investigated. INTRODUCTION Compound semiconductor-based devices form a critical component in high speed communications and radar technologies. Future advances in these areas will require integration of multiple functionalities and development of new capabilities. Such development can only occur if precise control of surface and interfacial properties can be achieved. Gallium arsenide (GaAs) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices require the use of a gate dielectric to reduce leakage current, passivate surface traps, and provide electrical isolation between devices. A suitable gate dielectric material must satisfy two requirements: (1) the interface between the GaAs substrate and the gate dielectric must have a low Dit to prevent the Fermi level from being pinned; and (2) the gate dielectric must have a high breakdown field to allow a gate voltage to be established. Promising results on GaAs have been obtained using crystalline gadolinium oxide (Gd2O3) [1], in spite of the bond length mismatch with
GaAs of ~4.4%. Based on this success with Gd2O3, Sm2O3 would appear to be a promising dielectric material for GaAs substrates based on its higher dielectric constant (18 vs. 11) [2] and lower lattice mismatch w
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