Optoelectronic CMOS Transistors: Performance Advantages for Sub-7nm ULSI, RF ASIC, Memories, and Power MOSFETs
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MRS Advances © 2019 Materials Research Society DOI: 10.1557/adv.2019.211
Optoelectronic CMOS Transistors: Performance Advantages for Sub-7nm ULSI, RF ASIC, Memories, and Power MOSFETs James N. Pan* Advanced Enterprise and License Company (AELC)
Email: [email protected]
Abstract
Substantial increase of output current, and Ion / Ioff ratio for sub-7nm low power CMOS transistors, can be accomplished using a novel optoelectronic technology, which is 100% compatible with existing CMOS process flow. For RF or mixed signal ASICs, adding photonic components may improve the cut-off frequency, and reduce series resistance. Products that utilize power regulating devices, such as power MOSFETs, will benefit from the optoelectronic configuration to achieve much lower Rdson and high voltage at the same time. For semiconductor memories, such as DRAM or FLASH, the photonic technique may reduce the ERASE / WRITE / access time and improve the reliability.
INTRODUCTION Photon generating and sensing devices [1–6] can be integrated in the drain region of a MOSFET, FINFET or power MOSFET as one transistor. Fig. 1 shows an equivalent circuit. The laser is turned on only when the MOSFET is switched to on. The laser is off then the MOSFET is switched off. When both laser and MOSFET are on, light is absorbed by the APD (Avalanche Photo Diode), which generates avalanche breakdown currents as part of the output drain current. In this paper we will discuss how to implement this optoelectronic technique for low power, high speed sub-7nm CMOS [7], memories (DRAM, SRAM, FLASH), and high power MOSFETs [8–10].
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Sub-7nm CMOS Transistors Process integration of a laser in the drain region of a MOSFET or FINFET may be simplified [10]. Fig. 1 (Left) shows a cross section of an optoelectronic MOSFET. An equivalent circuit of the device is also in Fig. 1 (Right). The laser is turned on only when a drain voltage and a suitable gate voltage are applied. If the MOSFET is off, the laser is off. A photon sensing device, or APD (Avalanche Photo Diode) is in between the drain and well regions. APD absorbs light from laser, and generates a large avalanche breakdown current to flow into the drain. Again, if the MOSFET is off, both laser and APD are off. If the MOSFET is on, and a drain voltage is applied, both laser and APD can be on. Ion / Ioff ratio is improved. The MOSFET drive current may be substantially improved with these optoelectronic devices.
Figure 1. (Left) Cross section of an optoelectronic MOSFET – a laser diode or LED is in drain region, and an APD is in between the drain and well regions. (Right) An equivalent circuit of an optoelectronic MOSFET.
Similar integration techniques can be applied to FINFETs, with low temperature selective epitaxy of lasing semiconductor films in the drain area of a FINFET (Fig. 2).
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