Parallel SEN: a new approach to improve the reliability of shuffle-exchange network
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Parallel SEN: a new approach to improve the reliability of shuffle‑exchange network Roshanak Abedini1 · Reza Ravanmehr1
© Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract In the past few decades, the demand for high-performance computing has been increasingly growing. These systems usually employ many processing elements working together via interconnection networks to solve complicated problems. Due to the efficiency and cost productivity, multistage interconnection networks (MINs) are recommended for use in such systems. At the same time, shuffle-exchange networks (SENs) have extensively been used as a suitable solution to multistage interconnection networks, given the size of their switching elements and simple configurations. In this paper, parallel SEN (PSEN) is proposed to enhance the reliability of these networks. Moreover, PSENs with one and two more stages (PSEN+ and PSEN+2) are utilized to optimize the reliability factor. The reliability analysis of the proposed network is performed through the reliability block diagram. According to the evaluation results, PSEN achieved higher reliability compared to SEN in different aspects of reliability, such as terminal, broadcast, and network. The proposed network also improves the cost-effectiveness in comparison with other MINs. Keywords Multistage interconnection network · Reliability block diagram · SEN · PSEN · PSEN+ · PSEN+2
1 Introduction Multistage interconnection networks (MINs) are considered a class of high-speed computer networks in which switching elements (SEs) usually connect processing elements (PEs) from one side of the network to memory elements (MEs) on the other side [1, 2]. The importance and necessity of MINs can usually be seen in high-efficiency or parallel computing for delay-free communications and costeffectiveness. Nevertheless, these networks face particular challenges, the most * Reza Ravanmehr [email protected] 1
Department of Computer Engineering, Central Tehran Branch, Islamic Azad University, Tehran, Iran
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important of which include fault tolerance, reliability, throughput, delay, and cost. Various methods and networks have been proposed to improve reliability [3–5]. Depending on the availability of routes for creating new connections, MINs are conventionally divided into three classes: blocking, nonblocking, and rearrangeable [6]. Generally, the structure of MINs includes two parts: sources (inputs) and destinations (outputs). These sources and destinations are connected through multistage switching elements so that every source can access every destination [7]. Usually, an N × N MIN consists of log2 N stages and a total of n × n switching elements, such that each stage contains N∕n switches. As a result, the complexity of an N × N MIN is O(N(logn N)). MINs are employed in different areas such as telecommunication switching, computer networks, transportation, software structures, integrated circuits, multiprocessing environments, aerospace
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