Pathway of Porous Silicon Formation Inside Si Nanowires Throughout Metal Assisted Etching
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Pathway of Porous Silicon Formation Inside Si Nanowires Throughout Metal Assisted Etching Alexander A. Tonkikh1, Nadine Geyer1, Bodo Fuhrmann2, Hartmut S. Leipner2, Peter Werner1 1
Max Planck Institute of Microstructure Physics, 2 Weinberg, Halle, D-06120, Germany
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Interdisciplinary Center of Materials Science, Martin Luther University Halle-Wittenberg, 4
Heinrich-Damerow Str., D-01620 Halle, Germany ABSTRACT The selective formation of porous silicon in nanowires is observed in Si/Ge epitaxial layers along Ge layers grown by molecular beam epitaxy on a Si(100) substrate after metalassisted chemical etching in aqueous HF-H2O2 solution. We assume that Ge layers serve as channels for a hole current out of the semiconductor to sustain the dissolution reaction. The tunnelling of holes through the potential barrier at the semiconductor surface is assumed to be the dominating mechanism of the hole transfer to the electrolyte. INTRODUCTION Both porous silicon and silicon nanowires (SNW) have attracted a lot of attention due to the possibility of their successful usage in electronics [1, 2], photonics [3, 4], and thermoelectrics [5]. Porous silicon can be routinely obtained via chemical or electrochemical etching of crystalline silicon [3, 6], while SNW can be obtained by epitaxial growth [7] or etching of a Si wafer [8]. The metal-assisted etching of Si without applying an external bias to the semiconductor-electrolyte system has been reported earlier [9]. The formation of well-defined SNW arrays via nanosphere lithography in addition to metal-assisted chemical etching has been successfully demonstrated recently [10]. Depending on the substrate resistivity the SNW arrays, formed via this method, are porous or crystalline [11]. The present paper discusses the pathway of porous silicon/germanium formation throughout metal-assisted SNW etching. We have prepared a sample with thin Ge layers embedded in Si by using molecular beam epitaxy (MBE). Such a sample has been particularly fabricated to investigate the mechanism of porous material formation during metal-assisted etching. EXPERIMENT P-doped Si (100) wafer (resistivity ~5 ȍcm) was used. The MBE growth was performed in a solid source reactor (Riber SIVA 45) after RCA cleaning. The growth temperature was 600 0C. The sample consisted of a 30 nm thick Si buffer layer followed by five Ge layers separated by 30 nm thick Si layers. Finally, the 100 nm thick Si capping layer was grown. All Si layers were Bdoped with a concentration of B atoms of 1 x 1018 cm-3. This doping level was chosen since a preliminary etching test had shown that SNW obtained from the epitaxial Si layers doped up to 1 x 1018 cm-3 were crystalline. We used Ge layers in order to get thin quantum wells (QWs) for holes in the valence band of Si. These QWs were used to get occupied states above the valence
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band edge of Si. The nominal thickness of the deposited Ge layer number 1, 2… 5 was 0.5 nm, 0.4 nm… 0.1 nm, correspondingly. The nominal thickness of the Ge layers was varied to tune the position of t
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