Physico-chemical Characterization of Thin Oxide Films: Difficulties and Solutions
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Physico-chemical Characterization of Thin Oxide Films: Difficulties and Solutions Thierry Conard1, and Wilfried Vandervorst1,2 1 MCA, IMEC, Kapeldreef 75, Leuven, 3001, Belgium 2 KUL, Leuven, 3001, Belgium ABSTRACT Oxides have always been an integral part of semiconductor manufacturing both in front and back-end processing. With the necessary increase in performance, the demand on these oxides has been increasing leading to their (future) replacement by more complex materials, such as high-k’s in gate oxide and metal gates. With the increasing material complexity, a thorough characterization of all aspects of these materials is necessary, covering, for instance, surfaces and interfaces, nucleation, growth, atomic structure, …. This article focuses on the characterization of front-end oxides and their interfaces. It shows that detailed information can be achieved by sophisticated experimental techniques such as synchrotron radiation, high energy ERD or AtomProbe but that adequate sample preparation and/or analysis by a combination of more routinely available techniques may achieve similar results. This is shown through the study of three different systems/problems in the gate stack analysis. We will first focus on the determination of substrate surface preparation conditions before deposition and their influence on growth mode and the growth characteristics by different growth techniques (ALD, MOCVD, …). Second, we present the possibilities of compositional depth profiling of thin layers both with nuclear techniques and Angle-Resolved XPS. Finally, we will show that using conventional XPS and a combination of front and back-side analysis, the interface between high-k oxide and metal gates can be investigated. More examples of gate stack characterization can be found elsewhere [1] INTRODUCTION The scaling of silicon integrated circuit devices to smaller physical dimensions is the primary activity of advanced device development since the start of this technology. This is pushed both by the need for higher performance, i.e. faster switching speed, and by the need to increase manufacturing profitability. As early as 1965, Gordon Moore observed that the number of bits on a memory integrated circuit was quadrupling every two years. This exponential increase of the density still continues today but has now been reduced to a 2-3 years cycle. In Metal-Oxide-Semiconductor devices, the switching speed is proportional to the transistor drive current, which in turn is proportional to the gate oxide capacitance. The oxide capacitance can be written in terms of the physical and electrical properties of the oxide as ε ox C Ox = d ox where εox is the dielectric permittivity of the gate oxide and dox is the thickness of the gate oxide. Hence, the improvement of the transistor performance can be achieved by (among others) decreasing the gate oxide thickness or increasing the dielectric constant of the gate oxide. Historically, the gate oxide has always been SiO2, and the thickness has been decreasing from the 50-100 nm ran
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