Plasma Etching Conditioning of Textured Crystalline Silicon Surfaces for a-Si/c-Si Heterojunctions

  • PDF / 878,589 Bytes
  • 6 Pages / 382.5 x 615.6 pts Page_size
  • 69 Downloads / 176 Views

DOWNLOAD

REPORT


ABSTRACT The development of a hybrid heterojunction fabricated by growing ultrathin amorphous silicon by Plasma Enhanced Chemical Vapor Deposition using temperatures below 250'C offers the potential of obtaining high efficiency solar cells deposited on glassy substrates. The surface preparation represents one of the most critical steps. The first aim of etching is to remove the native oxide layer from the surface of the crystalline wafer, before amorphous layer deposition. The possibility of obtaining this goal with a dry procedure that reduces the exposure of the sample to the environment is not trivial. We performed several dry etching processes but the best results were obtained using an etching process involving CF/0 2 gases. We have found evidence that plasma etching acts by removing the native oxide and the damaged surface of textured silicon and by leaving an active layer on silicon surface suitable for the emitter deposition. SEM analysis has confirmed that it is possible to find plasma process conditions where no appreciable damage and changes in surface morphology are induced. Detailed investigation was performed to find compatibility and optimization of amorphous layer deposition both on flat and textured cast silicon by changing the plasma process parameters. By using this process we achieved on cast silicon for solar applications photovoltaic conversion efficiencies of 12.9% on 51 cm 2 and 9.2% on 45 cm 2 active areas for amorphous crystalline heterostructure devices realized on monocrystalline and polycrystalline silicon respectively. We also investigated the compatibility of the process with industrial production of large area devices. INTRODUCTION The realization of electronic devices based on c-Si heterojunctions using amorphous silicon grown by Plasma Enhanced Chemical Vapor Deposition (PECVD) appears to be a very attractive and low cost technology, especially for large area applications such as solar cells [1,2]. In fact, due to the low temperature processes used during deposition of amorphous silicon, this junction forming technique can be efficiently applied also on substrates that degrade at high temperature, such as glass [3]. Moreover, due to the very low thickness of the amorphous silicon layers, these heterostructures do not show any light induced degradation as in the case of purely a-Si solar cells. Thus they can achieve high and stable conversion efficiencies. The fabrication process of an a-Si/c-Si heterojunction would seem very easy to perform using the well developed techniques for the realization of crystalline and amorphous silicon solar cells. Nevertheless particular care is needed in some critical steps of the process. The surface of the substrate must be regular enough to allow conformal deposition of the thin a-Si layer in order to avoid shorts between the substrate and other layers. Any high temperature step must be avoided after the deposition of amorphous silicon in order to preserve the junction integrity. One of the most critical steps in fabrication of the a-Si/c-Si heter