Power Saving Scheme for Process Corner Calibrated Standard Cell Based Flash ADC in Wireless Surveillance Applications
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ORIGINAL RESEARCH
Power Saving Scheme for Process Corner Calibrated Standard Cell Based Flash ADC in Wireless Surveillance Applications R. K. Siddharth1 · Y. B. Nithin Kumar1 · M. H. Vasantha1 Received: 2 June 2020 / Accepted: 10 September 2020 © Springer Nature Singapore Pte Ltd 2020
Abstract This paper proposes a power saving scheme to be used in standard cell based Flash ADC for wireless surveillance applications. The input signal to the wireless surveillance network has a very low activity during night time as compared to day time. Thus, the input signal rarely reaches voltage greater than a reference voltage VZ . The reference voltage VZ can be obtained by collecting a large number of light intensity samples during night time. The proposed power saving scheme uses an auxiliary standard cell comparator, whose switching threshold is kept equal to the reference voltage. The output of the auxiliary comparator disables a large number of comparator for all switching threholds greater than the reference voltage, thereby improving the power efficiency of the ADC. and simulated in a SCL 180 nm CMOS technology with a supply voltage of 1.8 V. The results show that the proposed design achieves an effective number of bits (ENOB) of 4.66 bits. The total power consumption of the proposed architecture using power saving scheme reduces at least by a factor of 2.5 in all the corners when compared to the existing standard cell based Flash ADC without power saving scheme. Keywords Analog to digital converters · Standard cells · Comparators
Introduction The growth in the potential incidents in various fields like agriculture, health-care monitoring system, etc. has increased the need for surveillance systems. Thus, they play a key role in day-to-day life. The block diagram of a typical surveillance system is shown in Fig. 1. Various applications use multiple sensors to sense the temperature, light, position, and many more. In wireless surveillance application, the sensor performance is limited by the battery life. The main power consuming block in such a system is the analog to This article is part of the topical collection “Technologies and Components for Smart Cities” guest edited by Himanshu Thapliyal, Saraju P. Mohanty, Srinivas Katkoori and Kailash Chandra Ray. * R. K. Siddharth [email protected] Y. B. Nithin Kumar [email protected] M. H. Vasantha [email protected] 1
National Institute of Technology Goa, Ponda, India
digital converter (ADC) [1–3]. As seen from Fig. 1, the signal is first sensed by the sensor and then processed through the signal conditioning interface block, which converts the signal to its equivalent voltage domain. The typical variations in the input signal with respect to time [4] is shown in Fig. 2. It can be noticed that the signal rarely reaches voltage values higher than the reference voltage VZ from 20:00 to 06:00 h. It indicates that such a signal has a very low activity during night time when compared to day time. If such an input signal is processed by a Flash AD
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