Programming Many-Core Chips
Based on current technology trends, in the near future programmers will have to program chips with hundreds or even thousands of processor cores (called many-core chips). Given the scale of parallelism inherent to these chips, software designers fac
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András Vajda
Programming Many-Core Chips With Contributions by Mats Brorsson and Diarmuid Corcoran Foreword by Håkan Eriksson
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András Vajda Oy L M Ericsson Ab Hirsalantie 11 02420 Jorvas Finland [email protected]
ISBN 978-1-4419-9738-8 e-ISBN 978-1-4419-9739-5 DOI 10.1007/978-1-4419-9739-5 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011930407 © Springer Science+Business Media, LLC 2011 All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com)
Dedicated to the loving memory of my grandmother. Mama, without your dedication and sacrifices, I would have never been in a position to accomplish this. Thank you. András Vajda
Foreword
Parallel computing has been confined, for much of its over 40 year history, to highly specialized, technology-wise advanced domains such as scientific computing or telecommunications. There were only a few experts who had the background and experience to write efficient, robust and scalable programs for these parallel machines. A few years ago all that suddenly changed with the emergence of multi-core and many-core processors, as we reached the end of seemingly endless single-core performance scaling. While Moore’s Law still provides chip designers with everincreasing amount of transistors for building chips, these chips will now all have multiple cores and there’s no end in sight for the scalability of computing power through the integration of ever more processor cores on the same piece of silicon. Practically overnight parallel programming skills became mandatory for most experts working in the field of computer programming. Ericsson has always been at the forefront of parallel programming. We have been delivering best in class massively parallel telecommunication systems for several decades and providing our customers with quality software running on systems with hundreds of processors has always been one of our core assets. Continued leadership in this area is essential for our future success: the amount of traffic in telecom networks and consequently, the amount of computation required to sustain it, is expected to grow orders of magnitude faster than what the chip industry can match, even if it continues to deliver according to Moore’s law. I believe we are well posit
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