An Efficient Architecture for Modified Lifting-Based Discrete Wavelet Transform
- PDF / 1,680,200 Bytes
- 22 Pages / 439.37 x 666.142 pts Page_size
- 85 Downloads / 204 Views
An Efficient Architecture for Modified Lifting‑Based Discrete Wavelet Transform Rohan Pinto1 · Kumara Shama2 Received: 31 March 2019 / Revised: 8 August 2020 / Accepted: 10 October 2020 © Springer Science+Business Media, LLC, part of Springer Nature 2020
Abstract A high speed and memory efficient lifting based architecture for one-dimensional (1-D) and two-dimensional (2-D) discrete wavelet transform (DWT) is proposed in this paper. The lifting algorithm is modified in this work to achieve a critical path of one multiplier delay with minimum pipeline registers. A 1-D DWT structure with two-input/two-output and four-input/four-output is developed based on the modified lifting scheme. The proposed 2-D DWT architecture for the Daubechies 5/3 and 9/7 filter comprises of two 1-D processors, together with a transpose and a temporal memory. An efficient transpose block is presented, which utilizes three registers to transpose the output sequence of the 1-D DWT block. The transpose block is independent of the size of the image read for the transform. The scanning process of an N × N image for a one-level 2-D transform is in Z fashion to minimize the temporal buffer to 4N and 2N for the 9/7 and 5/3 mode DWT respectively. The comparison results show that the proposed structure is hardware cost-effective and memory efficient, which is favorable for real-time visual operations. The model is described in VHDL and synthesized using the Cadence tool in 90 nm technology. Keywords Discrete wavelet transform (DWT) · Lifting scheme · 1-D DWT · 2-D DWT · Pipeline · VLSI architecture
1 Introduction The discrete wavelet transform (DWT) has established itself as an efficient tool for many applications, such as speech analysis, signal analysis, numerical analysis, video processing and compression due to its time-frequency localization characteristics [1]. It has been adapted in the JPEG-2000 standard due to its ability to
* Rohan Pinto [email protected] 1
St Joseph Engineering College, Mangalore, Karnataka, India
2
Manipal Institute of Technology, Manipal, Karnataka, India
13
Vol.:(0123456789)
53
Page 2 of 22
Sensing and Imaging
(2020) 21:53
decorrelate large images. The DWT is computationally intensive, which make it a challenge to implement. It requires a sizable quantity of arithmetic resources and memory. Therefore, to reduce the operational complexity Daubechies and Sweldens proposed the lifting scheme [2] to construct the DWT. The lifting based architectures have many advantages over the classical convolution based structures [3] in computational complexity, power consumption, and memory. At present, many VLSI architectures for the 2-D DWT based on both the convolution and lifting scheme are available for real-time processing. However, designing a highly efficient structure at low hardware cost is an exacting task. In this work, two DWT architectures for the biorthogonal 9/7 and 5/3 wavelet are proposed based on the modified lifting scheme. The advantages of the proposed structure are 100% hardware utilization,
Data Loading...
