Anomalous Leakage Current Reduction by Ramping Rate Control in Mev Implantation
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NEC
Corporation,
1120 Shimokuzawa,
ABSTRACT The crucial problem for buried layer formation using MeV implantation is the reduction of anomalous leakage current at the phosphorus dose of Ix 1014/cm2. We have demonstrated that the origin of anomalous leakage current is dislocations, on {Ill }Si planes, elongated along the direction and that these defects can be reduced by using a high ramping rate above 50'C /sec. At the low ramping rate below I0°C/sec, high leakage current above I nA was observed, which was caused by the extension of dislocations to the surface. On the other hand, by increasing the ramping rate above 50'C/sec, dislocations were formed around the Rp, but they did not extended to the surface and as a result, low leakage current was obtained. These results suggest that some kinds of defects can be suppressed by ramping rate. INTRODUCTION MeV implantation has been used in the device fabrication process, such as the retrograde well formation, buried layer formation for latch-up immunity improvement and collector formation in Bipolar devices[l], not only because of process step reduction but also device performance improvement. A medium dose(lxl10 3 - 5x1014/cm 2) implantation is required for 4these2 applications. It was reported that high leakage current was observed at the dose of lxl01 /cm at 0.7-3.0 MeV for furnace annealing[2], and that the leakage current was caused by microdefects[3]. However, the reason was not clear. According to the scaling of the device size below quarter-micron, a low thermal cycle is required. Therefore, the defect reduction on MeV implantation becomes a serious requirement for the improvement of electrical characteristics. In this paper, residual defects formed by MeV implantation, especially at the dose of I xl014/cm 2, has been investigated and a method for defect reduction through the ramping rate control has been developed. EXPERIMENTAL After LOCOS formation, IMeV P ions were implanted at doses ranging from 3x1013 to 5x1014/cm2 in p-type (100)Si substrates with l5nm thick SiO 2 films. Then, a furnace annealing or a rapid thermal annealing(RTA) was carried out. Furnace annealing was carried out at 10001C for 10 minutes. In RTA, the ramping rate was changed from 1 'C /sec to 250 'C /sec at temperatures of 1015 C, 1050'C and 1 00'C for 30 seconds. BF 2 ions were implanted at 20keV with the dose of lxl0' 5/cm 2 to form p÷/n junctions, followed by annealing at 9001C for 10 minutes. Leakage current was evaluated using p÷/n diodes, with a size of 500,U mo-. The residual defects were evaluated by transmission electron microscopy (TEM).
739 Mat. Res. Soc. Symp. Proc. Vol. 396 © 1996 Materials Research Society
RESULTS Leakage current evaluation Figure I shows the dependence of the junction leakage current at a reverse bias of -3 volts on the phosphorus dose. In the furnace annealing at 1000 C for 10 minutes, an anomalous leakage current of 500 pA was observed only at the dose of lIXl0' 4/cm 2, although small leakage current was observed for the other doses. On the other hand
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